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HT45F12 参数 Datasheet PDF下载

HT45F12图片预览
型号: HT45F12
PDF下载: 下载PDF文件 查看货源
内容描述: 8位闪存微控制器与运算放大器和比较器 [8-Bit Flash MCU with Op Amps & Comparators]
分类和应用: 闪存比较器微控制器运算放大器
文件页数/大小: 104 页 / 4764 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
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HT45F12  
8-Bit Flash MCU with Op Amps & Comparators  
EEPROM Data Memory  
OneꢀofꢀtheꢀspecialꢀfeaturesꢀinꢀtheꢀdeviceꢀisꢀitsꢀinternalꢀEEPROMꢀDataꢀMemory.ꢀEEPROM,ꢀwhichꢀ  
standsꢀforꢀElectricallyꢀErasableꢀProgrammableꢀReadꢀOnlyꢀMemory,ꢀisꢀbyꢀitsꢀnatureꢀaꢀnon-volatileꢀ  
formꢀofꢀmemory,ꢀwithꢀdataꢀretentionꢀevenꢀwhenꢀitsꢀpowerꢀsupplyꢀisꢀremoved.ꢀByꢀincorporatingꢀ  
thisꢀkindꢀofꢀdataꢀmemory,ꢀaꢀwholeꢀnewꢀhostꢀofꢀapplicationꢀpossibilitiesꢀareꢀmadeꢀavailableꢀtoꢀtheꢀ  
designer.ꢀTheꢀavailabilityꢀofꢀEEPROMꢀstorageꢀallowsꢀinformationꢀsuchꢀasꢀproductꢀidentificationꢀ  
numbers,ꢀcalibrationꢀvalues,ꢀspecificꢀuserꢀdata,ꢀsystemꢀsetupꢀdataꢀorꢀotherꢀproductꢀinformationꢀtoꢀ  
beꢀstoredꢀdirectlyꢀwithinꢀtheꢀproductꢀmicrocontroller.ꢀTheꢀprocessꢀofꢀreadingꢀandꢀwritingꢀdataꢀtoꢀtheꢀ  
EEPROMꢀmemoryꢀhasꢀbeenꢀreducedꢀtoꢀaꢀveryꢀtrivialꢀaffair.  
EEPROM Data Memory Structure  
TheꢀEEPROMꢀDataꢀMemoryꢀcapacityꢀisꢀ32×8ꢀbits.ꢀUnlikeꢀtheꢀProgramꢀMemoryꢀandꢀRAMꢀDataꢀ  
Memory,ꢀtheꢀEEPROMꢀDataꢀMemoryꢀisꢀnotꢀdirectlyꢀmappedꢀandꢀisꢀthereforeꢀnotꢀdirectlyꢀaccessibleꢀ  
inꢀsameꢀwayꢀasꢀtheꢀotherꢀtypesꢀofꢀmemory.ꢀReadꢀandꢀWriteꢀoperationsꢀtoꢀtheꢀEEPROMꢀareꢀcarriedꢀ  
outꢀinꢀsingleꢀbyteꢀoperationsꢀusingꢀanꢀaddressꢀandꢀdataꢀregisterꢀinꢀBankꢀ0ꢀandꢀaꢀsingleꢀcontrolꢀ  
registerꢀinꢀBankꢀ1.  
EEPROM Registers  
ThreeꢀregistersꢀcontrolꢀtheꢀoverallꢀoperationꢀofꢀtheꢀinternalꢀEEPROMꢀDataꢀMemory.ꢀTheseꢀareꢀtheꢀ  
addressꢀregister,ꢀEEADDR,ꢀtheꢀdataꢀregister,ꢀEEDATAandꢀaꢀsingleꢀcontrolꢀregister,ꢀEECTRL.ꢀAsꢀ  
bothꢀtheꢀEEADDRꢀandꢀEEDATAꢀregistersꢀareꢀlocatedꢀinꢀBankꢀ0,ꢀtheyꢀcanꢀbeꢀdirectlyꢀaccessedꢀinꢀtheꢀ  
sameꢀwayꢀasꢀanyꢀotherꢀSpecialꢀFunctionꢀRegister.ꢀTheꢀEECTRLꢀregisterꢀhowever,ꢀbeingꢀlocatedꢀinꢀ  
Bank1,ꢀcannotꢀbeꢀdirectlyꢀaddressedꢀdirectlyꢀandꢀcanꢀonlyꢀbeꢀreadꢀfromꢀorꢀwrittenꢀtoꢀindirectlyꢀusingꢀ  
theꢀMP1ꢀMemoryꢀPointerꢀandꢀIndirectꢀAddressingꢀRegister,ꢀIAR1.ꢀBecauseꢀtheꢀEECTRLꢀcontrolꢀ  
registerꢀisꢀlocatedꢀatꢀaddressꢀ40HꢀinꢀBankꢀ1,ꢀtheꢀMP1ꢀMemoryꢀPointerꢀmustꢀfirstꢀbeꢀsetꢀtoꢀtheꢀvalueꢀ  
40HꢀandꢀtheꢀBankꢀPointerꢀregister,ꢀBP,ꢀsetꢀtoꢀtheꢀvalue,ꢀ01H,ꢀbeforeꢀanyꢀoperationsꢀonꢀtheꢀEECTRLꢀ  
registerꢀareꢀexecuted.  
EEPROM Control Registers List  
Bit  
Name  
7
6
5
4
3
D3  
2
1
D1  
0
EEADDR  
EEDATA  
EECTRL  
D7  
Dꢅ  
D5  
D4  
D4  
Dꢄ  
Dꢄ  
WT  
D0  
D0  
RD  
D3  
D1  
WTEN  
RDEN  
EEADDR Register  
Bit  
Naꢁe  
R/W  
7
6
5
4
D4  
R/W  
0
3
D3  
R/W  
0
2
Dꢄ  
R/W  
0
1
D1  
R/W  
0
0
D0  
R/W  
0
POR  
Bitꢀ7~5ꢀ  
Bitꢀ4~0ꢀ  
Unimplemented,ꢀreadꢀasꢀ"0"  
DataꢀEEPROMꢀaddress  
DataꢀEEPROMꢀaddressꢀbitꢀ4ꢀ~ꢀbitꢀ0  
Rev. 0.00  
ꢄ9  
�eꢀteꢁꢂeꢃ ꢄꢅꢆ ꢄ01ꢄ