HT45B0F
·
UCR1 register
The UCR1 register together with the UCR2 register are the two UART control registers that are used to set the vari-
ous options for the UART function such as overall on/off control, parity control, data transfer bit length, etc. Further
explanation on each of the bits is given below:
Bit
Name
R/W
7
UARTEN
R/W
6
5
PREN
R/W
0
4
3
STOPS
R/W
0
2
TXBRK
R/W
0
1
RX8
R
0
BNO
R/W
0
PRT
R/W
0
TX8
W
POR
0
X
0
²x² unknown
Bit 7
UARTEN: UART function enable control
0: disable UART. TX and RX pins are in the state of high impedance
1: enable UART. TX and RX pins function as UART pins
The UARTEN bit is the UART enable bit. When this bit is equal to ²0², the UART will be
disabled and the RX pin as well as the TX pin will be in the state of high impedance. When the
bit is equal to ²1², the UART will be enabled and the TX and RX pins will function as defined by
the TXEN and RXEN enable control bits. When the UART is disabled, it will empty the buffer so
any character remaining in the buffer will be discarded. In addition, the value of the baud rate
counter will be reset. If the UART is disabled, all error and status flags will be reset. Also the
TXEN, RXEN, TXBRK, RXIF, OERR, FERR, PERR and NF bits will be cleared, while the TIDLE,
TXIF and RIDLE bits will be set. Other control bits in UCR1, UCR2 and BRG registers will remain
unaffected. If the UART is active and the UARTEN bit is cleared, all pending transmissions and
receptions will be terminated and the module will be reset as defined above. When the UART is
re-enabled, it will restart in the same configuration.
Bit 6
BNO: Number of data transfer bits selection
0: 8-bit data transfer
1: 9-bit data transfer
This bit is used to select the data length format, which can have a choice of either 8-bit or 9-bit
format. When this bit is equal to ²1², a 9-bit data length format will be selected. If the bit is
equal to ²0², then an 8-bit data length format will be selected. If 9-bit data length format is
selected, then bits RX8 and TX8 will be used to store the 9th bit of the received and transmitted
data respectively.
Bit 5
Bit 4
Bit 3
Bit 2
PREN: Parity function enable control
0: parity function is disabled
1: parity function is enabled
This is the parity enable bit. When this bit is equal to ²1², the parity function will be enabled. If
the bit is equal to ²0², then the parity function will be disabled.
PRT: Parity type selection bit
0: even parity for parity generator
1: odd parity for parity generator
This bit is the parity type selection bit. When this bit is equal to ²1², odd parity type will be
selected. If the bit is equal to ²0², then even parity type will be selected.
STOPS: Number of Stop bits selection
0: one stop bit format is used
1: two stop bits format is used
This bit determines if one or two stop bits are to be used. When this bit is equal to ²1², two
stop bits are used. If this bit is equal to ²0², then only one stop bit is used.
TXBRK: Transmit break character
0: no break character is transmitted
1: break characters transmit
The TXBRK bit is the Transmit Break Character bit. When this bit is ²0², there are no break
characters and the TX pin operates normally. When the bit is ²1², there are transmit break
characters and the transmitter will send logic zeros. When this bit is equal to ²1², after the
buffered data has been transmitted, the transmitter output is held low for a minimum of a 13-bit
length and until the TXBRK bit is reset.
Rev. 1.00
9
June 7, 2011
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
