欢迎访问ic37.com |
会员登录 免费注册
发布采购

HT45B0F 参数 Datasheet PDF下载

HT45B0F图片预览
型号: HT45B0F
PDF下载: 下载PDF文件 查看货源
内容描述: SPI到UART桥 [SPI-to-UART Bridge]
分类和应用:
文件页数/大小: 23 页 / 155 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
 浏览型号HT45B0F的Datasheet PDF文件第3页浏览型号HT45B0F的Datasheet PDF文件第4页浏览型号HT45B0F的Datasheet PDF文件第5页浏览型号HT45B0F的Datasheet PDF文件第6页浏览型号HT45B0F的Datasheet PDF文件第8页浏览型号HT45B0F的Datasheet PDF文件第9页浏览型号HT45B0F的Datasheet PDF文件第10页浏览型号HT45B0F的Datasheet PDF文件第11页  
HT45B0F
UART Commands
There are both read and write commands. For reading and writing to registers both command and address information
is contained within a single byte. The format for reading and writing is shown in the following table.
Command Type
Read FIFO
Read Register
Write FIFO
Write Register
Bit 7
0
0
0
0
Bit 6
0
0
0
0
Bit 5
0
0
0
0
Bit 4
0
1
0
1
Bit 3
0
0
1
1
Bit 2
X
A2
X
A2
Bit 1
X
A1
X
A1
Bit 0
X
A0
X
A0
Note:
²X²
here stands for
²don¢t
care²
UART Status and Control Registers
There are six registers associated with the UART function. The USR, UCR1, UCR2 and UCR3 registers control the
overall function, while the BRG register controls the Baud rate. The actual data to be transmitted and received on the
serial interface is managed through the TXR/RXR data register.
A[2:0]
00H
01H
02H
03H
04H
05H~
07H
Name
USR
UCR1
UCR2
BRG
UCR3
Unused
Reset
0000 1011
0000 0X00
0000 0000
XXXX XXXX
0---
----
---- ----
Bit 7
PERR
UARTEN
TXEN
BRG7
URST
Bit 6
NF
BNO
RXEN
BRG6
¾
Bit 5
FERR
PREN
BRGH
BRG5
¾
Bit 4
OERR
PRT
ADDEN
BRG4
¾
Reserved
UART Register Summary
·
USR Register
Bit 3
RIDLE
STOPS
WAKE
BRG3
¾
Bit 2
RXIF
TXBRK
RIE
BRG2
¾
Bit 1
TIDLE
RX8
TIIE
BRG1
¾
Bit 0
TXIF
TX8
TEIE
BRG0
¾
The USR register is the status register for the UART, which can be read by the application program to determine the
present status of the UART. All flags within the USR register are read only. Further explanation on each of the flags is
given below:
Bit
Name
R/W
POR
Bit 7
7
PERR
R
0
6
NF
R
0
5
FERR
R
0
4
OERR
R
0
3
RIDLE
R
1
2
RXIF
R
0
1
TIDLE
R
1
0
TXIF
R
1
PERR:
Parity error flag
0: no parity error is detected
1: parity error is detected
The PERR flag is the parity error flag. When this read only flag is
²0²,
it indicates a parity error
has not been detected. When the flag is
²1²,
it indicates that the parity of the received word is
incorrect. This error flag is applicable only if Parity mode (odd or even) is selected. The flag can
also be cleared by a software sequence which involves a read to the status register USR
followed by an access to the RXR data register.
NF:
Noise flag
0: no noise is detected
1: noise is detected
The NR flag is the noise flag. When this read only flag is
²0²,
it indicates no noise condition.
When the flag is
²1²,
it indicates that the UART has detected noise on the receiver input.
The NF flag is set during the same cycle as the RXIF flag but will not be set in the case of as
overrun. The NF flag can be cleared by a software sequence which will involve a read to the
status register USR followed by an access to the RXR data register.
Bit 6
Rev. 1.00
7
June 7, 2011