32-Bit ARM® Cortex™-M0+ MCU
HT32F52220/HT32F52230
List of Figures
Figure 1 Block Diagram ........................................................................................................................... 15
Figure 2 Memory Map.............................................................................................................................. 16
Figure 3 Clock Structure.......................................................................................................................... 18
Figure 4 24-pin SSOP Pin Assignment.................................................................................................... 19
Figure 5 28-pin SSOP Pin Assignment.................................................................................................... 20
Figure 6 33-pin QFN Pin Assignment ...................................................................................................... 21
Figure 7 ADC Sampling Network Model .................................................................................................. 31
Figure 8 I2C Timing Diagrams.................................................................................................................. 32
Figure 9 SPI Timing Diagrams – SPI Master Mode................................................................................. 34
Figure 10 SPI Timing Diagrams – SPI Slave Mode with CPHA=1........................................................... 34
Rev. 1.21
5 of 39
April 11, 2017