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HT27C040 参数 Datasheet PDF下载

HT27C040图片预览
型号: HT27C040
PDF下载: 下载PDF文件 查看货源
内容描述: COMS 512K ×8位OTP EPROM [COMS 512K x 8-Bit OTP EPROM]
分类和应用: 可编程只读存储器电动程控只读存储器
文件页数/大小: 9 页 / 98 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
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HT27C040
Program verify mode
Verification should be performed on the programmed
bits to determine whether they were correctly pro-
grammed. The verification should be performed with OE
at V
IL
, and CE at V
IH
, and VPP at its programming volt-
age.
Auto product identification
The Auto Product Identification mode allows the reading
out of a binary code from an EPROM that will identify its
manufacturer and the type. This mode is intended for
programming to automatically match the device to be
programmed with its corresponding programming algo-
rithm. This mode is functional in the 25°C±5°C ambient
temperature range that is required when programming
the HT27C040.
To activate this mode, the programming equipment
must force 12.0±0.5V on the address line A9 of the
HT27C040. Two identifier bytes may then be se-
quenced from the device outputs by toggling address
line A0 from V
IL
to V
IH
, when A1=V
IH
. All other address
lines must be held at V
IH
during Auto Product Identifica-
tion mode.
Byte 0 (A0=V
IL
) represents the manufacturer code, and
byte 1 (A0=V
IH
), the device code. For HT27C040, these
two identifier bytes are given in the Operation mode
truth table. When A1=V
IL,
the HT27C040 will read out
the binary code of 7F, continuation code, to signify the
unavailability of manufacturer ID codes.
Read mode
The has two control functions, both of which must be
logically satisfied in order to obtain data at outputs. Chip
Enable (CE) is the power control and should be used for
device selection. Output Enable (OE) is the output con-
trol and should be used to gate data to the output pins,
independent of device selection. Assuming that ad-
dresses are stable, address access time (t
ACC
) is equal
to the delay from CE to output (t
CE
). Data is available at
the outputs (t
OE
) after the falling edge of OE, assuming
the CE has been LOW and addresses have been stable
for at least t
ACC
-t
OE
.
Standby mode
The HT27C040 has CMOS standby mode which re-
duces the maximum VCC current to 10mA. It is placed in
CMOS standby when CE is at V
CC
±0.3V.
The
HT27C040 also has a TTL-standby mode which re-
duces the maximum VCC current to 1.0mA. It is placed
in TTL-standby when CE is at V
IH
. When in standby
mode, the outputs are in a high-impedance state, inde-
pendent of the OE input.
Two-line output control function
To accommodate multiple memory connections, a
two-line control function is provided to allow for:
·
Low memory power dissipation
·
Assurance that output bus contention will not occur
It is recommended that CE be decoded and used as the
primary device-selection function, while OE be made a
common connection to the READ line from the system
control bus. This assures that all deselected memory
devices are in their low-power standby mode and that
the output pins are only active when data is desired from
a particular memory device.
System considerations
During the switch between active and standby condi-
tions, transient current peaks are produced on the rising
and falling edges of Chip Enable. The magnitude of
these transient current peaks is dependent on the out-
put capacitance loading of the device. At a minimum, a
0.1mF ceramic capacitor (high frequency, low inherent
inductance) should be used on each device between
VCC and VPP to minimize transient effects. In addition,
to overcome the voltage drop caused by the inductive
effects of the printed circuit board traces on EPROM ar-
rays, a 4.7mF bulk electrolytic capacitor should be used
between VCC and VPP for each eight devices. The lo-
cation of the capacitor should be close to where the
power supply is connected to the array.
Rev. 1.00
5
April 30, 2001