HT24LC64
·
Write protect
·
Random read
The HT24LC64 has a write-protect function and pro-
gramming will then be inhibited when the WP pin is
connected to VCC. Under this mode, the HT24LC64 is
used as a serial ROM.
·
Read operations
The HT24LC64 supports three read operations,
namely, current address read, random address read
and sequential read. During read operation execution,
the read/write select bit should be set to
²1².
·
Current address read
A random read requires a dummy byte write sequence
to load in the data word address which is then clocked
in and acknowledged by the EEPROM. The
microcontroller must then generate another start con-
dition. The microcontroller now initiates a current ad-
dress read by sending a device address with the
read/write select bit high. The EEPROM acknowl-
edges the device address and serially clocks out the
data word. The microcontroller should respond with a
²no
ACK² signal (high) followed by a stop condition
(refer to Random read timing).
·
Sequential read
The internal data word address counter maintains the
last address accessed during the last read or write op-
eration, incremented by one. This address remains
valid between operations as long as the chip power is
maintained. The address will roll over during read
from the last byte of the last memory page to the first
byte of the first page. The address will roll over during
write from the last byte of the current page to the first
byte of the same page. Once the device address with
the read/write select bit set to one is clocked in and ac-
knowledged by the EEPROM, the current address
data word is serially clocked out. The microcontroller
does not respond with an input zero but generates a
following stop condition (refer to Current read timing).
Sequential reads are initiated by either a current ad-
dress read or a random address read. After the
microcontroller receives a data word, it responds with
an acknowledgment. As long as the EEPROM re-
ceives an acknowledgment, it will continue to incre-
ment the data word address and serially clock out
sequential data words. When the memory address
limit is reached, the data word address will roll over
and the sequential read continues. The sequential
read operation is terminated when the microcontroller
does not respond with a zero but generates a following
stop condition.
R e a d
S ta rt
S D A L in e
W r ite
S to p
D e v ic e a d d r e s s
A 2 A 1 A 0
D a ta
Current Address Read Timing
A C K
R /W
N o A C K
R e a d
D e v ic e A d d r e s s
A 2 A 1 A 0
1 s t, 2 n d W o rd
A d d re s s (n )
S ta rt
S D A L in e
S ta rt
S to p
D e v ic e A d d r e s s
A 2 A 1 A 0
D a ta (n )
D u m m y W r ite
N o t e : * = D o n 't c a r e b it s
A C K
R /W
Random Read Timing
A C K
A C K
N o A C K
R e a d
D e v ic e
A d d re s s
S D A L in e
S to p
D a ta (n )
D a ta (n + 1 )
D a ta (n + 2 )
D a ta (n + x )
A C K
R /W
A C K
Sequential Read Timing
A C K
A C K
N o A C K
Rev. 1.40
5
June 22, 2010
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
