HT23B60
Pad Description
Mask
Option
Pad No.
Pad Name
I/O
Description
4~1
SEG0~3
O
Selectable as LCD segment signal output or keyscan strobe signal.
Bidirectional 8-bit input/output port. Each bit can be configured as
¾
Wake-up wake-up input by mask option. Software instructions determine the
or None CMOS output or Schmitt trigger input with or without pull-high regis-
ter by register [35H].
12~5
PA0~PA7
I/O
I/O
Bidirectional 2-bit input/output port
14~13
PB4~PB5
PB3/INT
Schmitt trigger input with or without pull-high register by software op-
tion or CMOS output
¾
Software instructions determine the bidirectional input/output pin or
external interrupt Schmitt trigger input or CMOS output. When the
[INTC0].1 is set to ²1² the PB3 will used to external interrupt input pin.
For I/O pin: Schmitt trigger input with or without pull-high register by
software option or CMOS output
15
I/O
¾
For INT: Edge trigger activated on a falling edge.
Can be optioned as bidirectional input/output or serial data input.
I/O
or
I
Serial For I/O pin: Schmitt trigger input or CMOS output, see mask option
Data Input table for pull-high function
16
17
PB2/DI
For serial data input: serial data input without pull-high resistor
Can be optioned as bidirectional input/output or serial data output.
I/O
or
Serial
For I/O pin: Schmitt trigger input or CMOS output, see mask option
PB1/DO
Data
table for pull-high function
Output
O
For serial data output: SK is a CMOS output
Can be optioned as bidirectional input/output or serial interface clock
signal.
For I/O pin: Schmitt trigger input with or without pull-high resistor by
SCLK register [36H] or CMOS output
18
PB0/SCLK
I/O
Signal For serial interface clock signal: Use as serial I/O interface clock
signal
SCLK should be set as serial clock output and after 8 clocks from the
SCLK terminal, clock output is automatically suspended.
19
RES
I
Schmitt trigger reset input. Active low.
Positive power supply
¾
¾
¾
¾
¾
20, 21
22, 23
24
VDD
¾
¾
O
O
VSS
Negative power supply, ground
Positive PWM CMOS output
Negative PWM CMOS output
PWM1
PWM2
25
A 32768Hz crystal (or resonator) should be connected to this pin and
XIN
26
XOUT
O
¾
A 32768Hz crystal (or resonator) should be connected to this pin and
XOUT
27
28
XIN
XC
I
I
¾
¾
External low pass filter used for frequency up conversion circuit
29
31
33
35
37
TRIM0
TRIM1
TRIM2
TRIM3
TRIM4
Test pin only
¾
¾
This pin detects battery low through external R1/R2 to determine
threshold, when the low voltage detect function is disabled, the
²LBIN² pin should be connected to VDD.
30
32
LBIN
I
I
¾
¾
VLCD
LCD voltage input
Rev. 1.10
5
March 1, 2004