HT23B60
60´11 Pixel Data Bank 8-Bit Mask MCU
Features
·
Operating voltage range: 2.4V~5.5V
·
Program ROM: 32K´16 bits
·
Data RAM: 2.3K´8 bits
·
16-bit table read instructions
·
Eight-level subroutine nesting
·
Timer
-
Two 16-bit programmable timer counters
-
Real time clock (RTC)
-
Watchdog Timer (WDT)
·
Four operating modes: Idle mode, Sleep mode,
·
Build-in Low Battery detector
·
14 bidirectional I/O lines, 16 bidirectional I/O lines are
share pin with segments
·
LCD driver:
-
Up to a max. of 60 segments and 11 common
-
660 dots, 1/4 or 1/5 bias capability, 1/10 or 1/11
duty, R type
-
LCD com/seg driving strength can be adjusted to
Green mode and Normal mode
·
Built-in 32768Hz x¢tal oscillator circuit
·
Build-in circuit dual system clock 32768Hz, 3.58MHz
compromise the display quality and current
consumption, adjustable 16-level VLCD
-
Segment 0~15 supports Key Scan function
·
Build-in a serial-parallel-interface hardware circuit
·
Build-in a 8-bit PWM D/A hardware circuit
·
100-pin QFP package
General Description
HT23B60 is an 8-bit CMOS microcontroller with various
functionalities in a compact package such as SRAM,
ROM I/Os, interrupt controller, timer and LCD control-
ler/driver. It¢s suitable for use as electrical data bank,
LCD game, calendar and speech products.
Block Diagram
R E S
P ro g ra m
C o u n te r
P ro g ra m
R O M
S T A
S T A
S T A
S T A
S T A
S T A
S T A
S T A
C K 0
C K 1 3 2 7 6 8 H z IN T /P B 3
C K 2
C K 3
In te rru p t
C ir c u it
C K 4
C K 5
R T C
C K 6
IN T C
C K 7
T M R 0
T M R 0 C
T M R 2
M
U
X
S Y S C L K /4
3 .5 8 M H z /4
3 2 7 6 8 H z
M
U
X
P W M 1
In s tr u c tio n
R e g is te r
P W M D A C 1
M P 0
M P 1
M
U
X
D A T A
M e m o ry
T M R 2 C
P F D
M
P W M D A C 2
U
X
P W M 2
In s tr u c tio n
D e c o d e r
A L U
T im in g
G e n e ra to r
A C C
M U X
P A
P A C
P A 0 ~ P A 7
S T A T U S
S h ifte r
P B
P B C
P B 0 ~ P B 5
X IN
X O U T
X C
O S C
C ir c u it
3 .5 8 M H z
L C D
M e m o ry
W D T S
W D T P r e s c a le r
V L C D
C O M 0
C O M 1
C O M 9
C O M 1 0
S E G 0
S E G 1
S E G 5 8
S E G 5 9
3 2 7 6 8 H z
W D T O S C
S y s te m C lo c k /4
L B IN
L C D D r
6 0
´
1
1 /4 , 1 /5
1 /1 0 , 1 /1 1
1
iv e r
B ia s
D u ty
L o w
V o lta g e D e te c to r
S E G 0 ~ 1 5
K e y S c a n S tro b e
S e r ia l
In te rfa c e
S C L K /P B 0
D I/P B 2
D O /P B 1
Rev. 1.10
1
March 1, 2004
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
