HT1660
A.C. Characteristics
Ta=25°C
Test Conditions
Conditions
Symbol
Parameter
Min.
Typ.
Max.
Unit
VDD
3V
5V
3V
5V
3V
5V
3V
5V
3V
5V
3V
5V
22
24
¾
¾
¾
¾
32
32
40
40
¾
¾
¾
¾
kHz
kHz
kHz
kHz
kHz
kHz
fSYS1
System Clock
On-chip RC oscillator
Crystal oscillator
32.768
32.768
32
fSYS2
fSYS3
fLCD1
fLCD2
System Clock
System Clock
External clock source
On-chip RC oscillator
Crystal oscillator
32
61/117 89/170 111/213
61/117 89/170 111/213
Hz
Hz
LCD Frame Frequency
LCD Frame Frequency
64
64
Hz
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
Hz
64
Hz
¾
fLCD3
tCOM
fCLK1
LCD Frame Frequency
LCD Common Period
4-Bit Data Clock (WR Pin)
External clock source
n: Number of COM
Duty cycle 50%
64
Hz
¾
n/fLCD
sec
kHz
kHz
kHz
kHz
¾
3V
5V
3V
5V
¾
150
300
75
¾
¾
¾
¾
fCLK2
4-Bit Data Clock (RD Pin)
Duty cycle 50%
CS
150
4-Bit Interface Reset Pulse Width
(Figure 3)
tCS
250
ns
¾
¾
¾
¾
Write mode
Read mode
Write mode
Read mode
3.34
6.67
1.67
3.34
3V
¾
ms
tCLK
WR, RD Input Pulse Width (Figure 1)
5V
¾
¾
¾
¾
¾
¾
¾
ms
ns
ns
ns
ns
ns
3V
5V
3V
5V
3V
5V
3V
5V
3V
5V
Rise/Fall Time Serial Data Clock
Width (Figure 1)
tr, tf
120
120
120
100
100
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
Setup Time for DB to WR, RD Clock
Width (Figure 2)
tsu
Hold Time for DB to WR, RD Clock
Width (Figure 2)
th
Setup Time for CS to WR, RD Clock
Width (Figure 3)
tsu1
Hold Time for CS to WR, RD Clock
Width (Figure 3)
th1
Rev. 1.30
7
April 13, 2006