欢迎访问ic37.com |
会员登录 免费注册
发布采购

HT1621B 参数 Datasheet PDF下载

HT1621B图片预览
型号: HT1621B
PDF下载: 下载PDF文件 查看货源
内容描述: 内存映射32×4 LCD控制器的I / O MCU [RAM Mapping 324 LCD Controller for I/O MCU]
分类和应用: 控制器
文件页数/大小: 20 页 / 177 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
 浏览型号HT1621B的Datasheet PDF文件第2页浏览型号HT1621B的Datasheet PDF文件第3页浏览型号HT1621B的Datasheet PDF文件第4页浏览型号HT1621B的Datasheet PDF文件第5页浏览型号HT1621B的Datasheet PDF文件第7页浏览型号HT1621B的Datasheet PDF文件第8页浏览型号HT1621B的Datasheet PDF文件第9页浏览型号HT1621B的Datasheet PDF文件第10页  
HT1621  
A.C. Characteristics  
Ta=25°C  
Test Conditions  
Conditions  
Symbol  
Parameter  
Min.  
Typ.  
Max. Unit  
VDD  
¾
fSYS1  
fSYS2  
fSYS3  
System Clock  
System Clock  
System Clock  
On-chip RC oscillator  
Crystal oscillator  
256  
32.768  
256  
kHz  
kHz  
kHz  
Hz  
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
External clock source  
On-chip RC oscillator  
Crystal oscillator  
¾
¾
f
f
SYS1/1024  
¾
¾
fLCD  
fSYS2/128  
LCD Clock  
Hz  
¾
¾
SYS3/1024  
External clock source  
n: Number of COM  
Hz  
¾
¾
tCOM  
n/fLCD  
¾
LCD Common Period  
s
¾
¾
3V  
5V  
3V  
5V  
¾
150  
300  
75  
150  
¾
kHz  
kHz  
kHz  
kHz  
kHz  
fCLK1  
Serial Data Clock (WR pin)  
Duty cycle 50%  
Duty cycle 50%  
¾
¾
fCLK2  
Serial Data Clock (RD pin)  
Tone Frequency  
¾
fTONE  
tCS  
On-chip RC oscillator  
CS  
2.0 or 4.0  
250  
Serial Interface Reset Pulse  
Width (Figure 3)  
ns  
¾
¾
¾
Write mode  
Read mode  
Write mode  
Read mode  
3.34  
6.67  
1.67  
3.34  
¾
¾
¾
¾
¾
¾
¾
¾
3V  
ms  
WR, RD Input Pulse Width  
(Figure 1)  
tCLK  
5V  
ms  
Rise/Fall Time Serial Data  
Clock Width (Figure 1)  
tr, tf  
120  
120  
120  
100  
100  
ns  
ns  
ns  
ns  
ns  
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
Setup Time for DATA to WR,  
RD Clock Width (Figure 2)  
tsu  
Hold Time for DATA to WR, RD  
Clock Width (Figure 2)  
th  
Setup Time for CS to WR, RD  
Clock Width (Figure 3)  
tsu1  
Hold Time for CS to WR, RD  
Clock Width (Figure 3)  
th1  
V
a
l
i
d
D
a
t
a
t
f
t
r
V
G
D
D
V
G
D
D
9
0
%
W
R
,
R
D
D
B
5
0
%
5
0
%
N
D
C
l
o
c
k
N
D
1
0
%
t
S
U
t
h
t
C L K  
t
C L K  
V
G
D
D
W
R
,
R
D
5
0
%
Figure 1  
C
l
o
c
k
N
D
Figure 2  
t
C S  
V
G
D
D
5
0
%
C
S
N
D
t
h 1  
t
S U 1  
V
G
D
D
W
R
,
R
D
5
0
%
C
l
o
c
k
N
D
F
i
r
s
t
C
l
o
c
k
L
a
s
t
C
l
o
c
k
Figure 3  
Rev. 1.30  
6
August 6, 2003  
 复制成功!