HT1620
Pad Description
Pad No. Pad Name
I/O
O
Description
Half voltage circuit output pin
2
VO15N
3
VEE
Double voltage circuit output pin
LCD common outputs
¾
O
4~7
8~39
COM0~COM3
SEG0~SEG31
O
LCD segment outputs
Chip selection input with pull-high resistor
When the CS is logic high, the data and command, read from or
written to the HT1620 are disabled. The serial interface circuit is
also reset. But if the CS is at logic low level and is input to the CS
pad, the data and command transmission between the host con-
troller and the HT1620 are all enabled.
40
CS
I
READ clock input with pull-high resistor
Data in the RAM of the HT1620 are clocked out on the falling
edge of the RD signal. The clocked out data will appear on the
DATA line. The host controller can use the next raising edge to
latch the clocked out data.
41
42
RD
I
I
WRITE clock input with pull-high resistor
Data on the DATA line are latched into the HT1620 on the rising
edge of the WR signal.
WR
43
44
45
46
47
48
DATA
VSS
I/O Serial data input/output with pull-high resistor
Negative power supply, Ground
¾
O
I
OSCO
OSCI
VDD
IRQ
The OSCI and OSCO pads are connected to a 32.768kHz crystal
in order to generate a system clock.
Positive power supply
¾
O
O
Time base or WDT overflow flag, NMOS open drain output
2kHz or 4kHz tone frequency output pair (tri-state output buffer)
49, 50 BZ, BZ
51, 1 CC1, CC2
External capacitor pin, for double voltage and half voltage circuit
use
I
Absolute Maximum Ratings
Storage Temperature.................-50oC to 125oC
Operating Temperature...............-25oC to 75oC
Supply Voltage..............................-0.3V to 3.6V
Input Voltage.................VSS-0.3V to VDD+0.3V
Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maxi-
mum Ratings² may cause substantial damage to the device. Functional operation of this de-
vice at other conditions beyond those listed in the specification is not implied and prolonged
exposure to extreme conditions may affect device reliability.
6
July 26, 1999