欢迎访问ic37.com |
会员登录 免费注册
发布采购

BS85C20-5_12 参数 Datasheet PDF下载

BS85C20-5_12图片预览
型号: BS85C20-5_12
PDF下载: 下载PDF文件 查看货源
内容描述: 触摸按键闪存型8位微控制器与LCD / LED驱动器 [Touch Key Flash Type 8-Bit MCU with LCD/LED Driver]
分类和应用: 驱动器闪存微控制器
文件页数/大小: 183 页 / 7817 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
 浏览型号BS85C20-5_12的Datasheet PDF文件第83页浏览型号BS85C20-5_12的Datasheet PDF文件第84页浏览型号BS85C20-5_12的Datasheet PDF文件第85页浏览型号BS85C20-5_12的Datasheet PDF文件第86页浏览型号BS85C20-5_12的Datasheet PDF文件第88页浏览型号BS85C20-5_12的Datasheet PDF文件第89页浏览型号BS85C20-5_12的Datasheet PDF文件第90页浏览型号BS85C20-5_12的Datasheet PDF文件第91页  
BS85B12-3/BS85C20-3/BS85C20-5  
Touch Key Flash MCU with LCD/LED Driver  
Standard Type TM Operating Modes  
TheꢀStandardꢀTypeꢀTMꢀcanꢀoperateꢀinꢀoneꢀofꢀfiveꢀoperatingꢀmodes,ꢀCompareꢀMatchꢀOutputꢀ  
Mode,ꢀPWMꢀMode,ꢀSingleꢀPulseꢀOutputꢀMode,ꢀCaptureꢀInputꢀModeꢀorꢀTimer/CounterꢀMode.ꢀTheꢀ  
operatingꢀmodeꢀisꢀselectedꢀusingꢀtheꢀTnM1ꢀandꢀTnM0ꢀbitsꢀinꢀtheꢀTMnC1ꢀregister.  
Compare Match Output Mode  
Toselectꢀthisꢀmode,ꢀbitsꢀTnM1ꢀandꢀTnM0ꢀinꢀtheꢀTMnC1ꢀregister,ꢀshouldꢀbeꢀsetꢀtoꢀ00ꢀrespectively.ꢀ  
Inꢀthisꢀmodeꢀonceꢀtheꢀcounterꢀisꢀenabledꢀandꢀrunningꢀitꢀcanꢀbeꢀclearedꢀbyꢀthreeꢀmethods.ꢀTheseꢀareꢀ  
aꢀcounterꢀoverflow,ꢀaꢀcompareꢀmatchꢀfromꢀComparatorꢀAꢀandꢀaꢀcompareꢀmatchꢀfromꢀComparatorꢀP.ꢀ  
WhenꢀtheꢀTnCCLRꢀbitꢀisꢀlow,ꢀthereꢀareꢀtwoꢀwaysꢀinꢀwhichꢀtheꢀcounterꢀcanꢀbeꢀcleared.ꢀOneꢀisꢀwhenꢀ  
aꢀcompareꢀmatchꢀfromꢀComparatorꢀP,ꢀtheꢀotherꢀisꢀwhenꢀtheꢀCCRPꢀbitsꢀareꢀallꢀzeroꢀwhichꢀallowsꢀ  
theꢀcounterꢀtoꢀoverflow.ꢀHereꢀbothꢀTnAFꢀandꢀTnPFꢀinterruptꢀrequestꢀflagsꢀforꢀComparatorꢀAꢀandꢀ  
ComparatorꢀPꢀrespectively,ꢀwillꢀbothꢀbeꢀgenerated.  
IfꢀtheꢀTnCCLRꢀbitꢀinꢀtheꢀTMnC1ꢀregisterꢀisꢀhighꢀthenꢀtheꢀcounterꢀwillꢀbeꢀclearedꢀwhenꢀaꢀcompareꢀ  
matchꢀoccursꢀfromꢀComparatorꢀA.ꢀHowever,ꢀhereꢀonlyꢀtheꢀTnAFꢀinterruptꢀrequestꢀflagꢀwillꢀbeꢀ  
generatedꢀevenꢀifꢀtheꢀvalueꢀofꢀtheꢀCCRPꢀbitsꢀisꢀlessꢀthanꢀthatꢀofꢀtheꢀCCRAꢀregisters.ꢀThereforeꢀwhenꢀ  
TnCCLRꢀisꢀhighꢀnoꢀTnPFꢀinterruptꢀrequestꢀflagꢀwillꢀbeꢀgenerated.ꢀInꢀtheꢀCompareꢀMatchꢀOutputꢀ  
Mode,ꢀtheꢀCCRAꢀcanꢀnotꢀbeꢀsetꢀtoꢀ0.  
Coꢀnter  
TnCCLR = 0; TnM[1:0] = 00  
Coꢀnter Valꢀe  
overflow  
CCRP = 0  
CCRP > 0  
Coꢀnter cleared by CCRP valꢀe  
0x3FF  
CCRP  
CCR�  
CCRP > 0  
Paꢀse Resꢀme  
Coꢀnter  
Reset  
Stop  
Time  
TnON  
TnP�U  
Tn�POL  
CCRP Int.  
Flaꢁ TnPF  
CCR� Int.  
Flaꢁ Tn�F  
TM O/P Pin  
Oꢀtpꢀt inverts  
when TnPOL is hiꢁh  
Reset to initial valꢀe  
Oꢀtpꢀt controlled  
by other pin-shared fꢀnction  
Oꢀtpꢀt not affected by  
Tn�F flaꢁ. Remains Hiꢁh  
ꢀntil reset by TnON bit  
Oꢀtpꢀt Pin set  
to Initial Level  
Low if TnOC = 0  
Oꢀtpꢀt Toꢁꢁle  
with Tn�F flaꢁ  
Oꢀtpꢀt Pin  
Now TnIO [1:0] = 10  
�ctive Hiꢁh Oꢀtpꢀt  
Select  
Here TnIO [1:0] = 11  
Toꢁꢁle Oꢀtpꢀt Select  
Compare Match Output Mode – TnCCLR = 0  
Note:ꢀ1.ꢀWithꢀTnCCLR=0ꢀaꢀComparatorꢀPꢀmatchꢀwillꢀclearꢀtheꢀcounter  
2.ꢀTheꢀTMꢀoutputꢀpinꢀisꢀcontrolledꢀonlyꢀbyꢀtheꢀTnAFꢀflag  
3.ꢀTheꢀoutputꢀpinꢀisꢀresetꢀtoꢀitsinitialꢀstateꢀbyꢀaꢀTnONꢀbitꢀrisingꢀedge  
Rev. 1.20  
87  
�ꢀꢁꢀst 10ꢂ 2012