BS85B12-3/BS85C20-3/BS85C20-5
Touch Key Flash MCU with LCD/LED Driver
Standard Type TM Register Description
OverallꢀoperationꢀofꢀtheꢀStandardꢀTMꢀisꢀcontrolledꢀusingꢀaꢀseriesꢀofꢀregisters.ꢀAꢀreadꢀonlyꢀregisterꢀ
pairꢀexistsꢀtoꢀstoreꢀtheꢀinternalꢀcounterꢀ10-bitꢀvalue,ꢀwhileꢀaꢀread/writeꢀregisterꢀpairꢀexistsꢀtoꢀstoreꢀ
theꢀinternalꢀ10-bitꢀCCRAꢀvalue.ꢀTheꢀremainingꢀtwoꢀregistersꢀareꢀcontrolꢀregistersꢀwhichꢀsetupꢀtheꢀ
differentꢀoperatingꢀandꢀcontrolꢀmodesꢀasꢀwellꢀasꢀtheꢀthreeꢀCCRPꢀbits.
STM Register List
Name
TM2C0
TM2C1
TM2DL
TM2DH
TM2�L
TM2�H
Bit7
T2P�U
T2M1
D7
Bit6
T2CK2
T2M0
D6
Bit5
T2CK1
T2IO1
D5
Bit4
T2CK0
T2IO0
D4
Bit3
T2ON
T2OC
D3
Bit2
T2RP2
T2POL
D2
Bit1
Bit0
T2RP1
T2RP0
T2DPX T2CCLR
D1
D9
D1
D9
D0
D8
D0
D8
—
—
—
—
—
—
D7
D6
D5
D4
D3
D2
—
—
—
—
—
—
10-bit Standard TM Register List
TM2C0 Register
Bit
7
6
T2CK2
R/W
0
5
T2CK1
R/W
0
4
T2CK0
R/W
0
3
T2ON
R/W
0
2
T2RP2
R/W
0
1
T2RP1
R/W
0
0
T2RP0
R/W
0
Name
R/W
T2P�U
R/W
0
POR
Bitꢀ7ꢀ
T2PAU:ꢀTM2ꢀCounterꢀPauseꢀControlꢀ
ꢀ 0:ꢀrunꢀ
ꢀ 1:ꢀpause
Theꢀcounterꢀcanꢀbeꢀpausedꢀbyꢀsettingꢀthisꢀbitꢀhigh.ꢀClearingꢀtheꢀbitꢀtoꢀzeroꢀrestoresꢀ
normalꢀcounterꢀoperation.ꢀWhenꢀinꢀaꢀPauseꢀconditionꢀtheꢀTMꢀwillꢀremainꢀpoweredꢀupꢀ
andꢀcontinueꢀtoꢀconsumeꢀpower.ꢀTheꢀcounterꢀwillꢀretainꢀitsꢀresidualꢀvalueꢀwhenꢀthisꢀbitꢀ
changesꢀfromꢀlowꢀtoꢀhighꢀandꢀresumeꢀcountingꢀfromꢀthisꢀvalueꢀwhenꢀtheꢀbitꢀchangesꢀ
toꢀaꢀlowꢀvalueꢀagain.
Bitꢀ6~4ꢀ
T2CK2~T2CK0:ꢀSelectꢀTM2ꢀCounterꢀclockꢀ
ꢀ 000:ꢀfSYS/4ꢀ
ꢀ 001:ꢀfSYS
ꢀ
ꢀ 010:ꢀfH/16ꢀ
ꢀ 011:ꢀfH/64ꢀ
ꢀ 100:ꢀfTBC
ꢀ
ꢀ 101:ꢀundefinedꢀ
ꢀ 110:ꢀTCK2ꢀrisingꢀedgeꢀclockꢀ
ꢀ 111:ꢀTCK2ꢀfallingꢀedgeꢀclock
TheseꢀthreeꢀbitsꢀareꢀusedꢀtoꢀselectꢀtheꢀclockꢀsourceꢀforꢀtheꢀTM.ꢀSelectingꢀtheꢀReservedꢀ
clockꢀinputꢀwillꢀeffectivelyꢀdisableꢀtheꢀinternalꢀcounter.ꢀTheꢀexternalꢀpinꢀclockꢀsourceꢀ
canꢀbeꢀchosenꢀtoꢀbeꢀactiveꢀonꢀtheꢀrisingꢀorꢀfallingꢀedge.ꢀTheꢀclockꢀsourceꢀfSYSꢀisꢀtheꢀ
systemꢀclock,ꢀwhileꢀfHꢀandꢀfTBCꢀareꢀotherꢀinternalꢀclocks,ꢀtheꢀdetailsꢀofꢀwhichꢀcanꢀbeꢀ
foundꢀinꢀtheꢀoscillatorꢀsection.
Bitꢀ3ꢀ
T2ON:ꢀTM2ꢀCounterꢀOn/OffꢀControlꢀ
ꢀ 0:ꢀOffꢀ
ꢀ 1:ꢀOn
Thisꢀbitꢀcontrolsꢀtheꢀoverallꢀon/offꢀfunctionꢀofꢀtheꢀTM.ꢀSettingꢀtheꢀbitꢀhighꢀenablesꢀtheꢀ
counterꢀtoꢀrun,ꢀclearingꢀtheꢀbitꢀdisablesꢀtheꢀTM.ꢀClearingꢀthisꢀbitꢀtoꢀzeroꢀwillꢀstopꢀtheꢀ
counterꢀfromꢀcountingꢀandꢀturnꢀoffꢀtheꢀTMꢀwhichꢀwillꢀreduceꢀitsꢀpowerꢀconsumption.ꢀ
Whenꢀtheꢀbitꢀchangesꢀstateꢀfromꢀlowꢀtoꢀhighꢀtheꢀinternalꢀcounterꢀvalueꢀwillꢀbeꢀresetꢀtoꢀ
zero,ꢀhoweverꢀwhenꢀtheꢀbitꢀchangesꢀfromꢀhighꢀtoꢀlow,ꢀtheꢀinternalꢀcounterꢀwillꢀretainꢀ
itsꢀresidualꢀvalueꢀuntilꢀtheꢀbitꢀreturnsꢀhighꢀagain.
Rev. 1.20
83
�ꢀꢁꢀst 10ꢂ 2012