HMC1060LP3E
v00.1211
QUAD LOW NOISE HIGH PSRR
LINEAR VOLTAGE REGULATOR
Application Schematic
Power Conditioning - SMt
in order to achieve the typical noise performance specified in the electrical Specifications table, a 4.7 µF decoupling
capacitor between reF and gnd pins (C1), and 100 nF capacitors connected between output pins Vrx (x=1,2,3,4)
and respective rdx pins (C2, C3, C4 and C5) are required. if noise performance is not critical for a particular output,
the 100 nF capacitor can be omitted for the corresponding regulator output. in that case, noise spectral density will
typically increase by a factor of 20 at 10 kHz. the 4.7 µF reF capacitor causes approximately 40 ms typical turn-on
start-up time. the effects of reducing the reF capacitor on regulator noise performance and regulator turn-on time
are shown in
and
external enable Pin & Power Up timing
section respectively.
9
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Phone: 978-250-3343
Fax: 978-250-3373
Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com