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HD6473434F16 参数 Datasheet PDF下载

HD6473434F16图片预览
型号: HD6473434F16
PDF下载: 下载PDF文件 查看货源
内容描述: 12伏不能应用于S -掩模模型(单电源规格) ,因为这可能会永久损坏设备。 [12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.]
分类和应用: 外围集成电路微控制器可编程只读存储器时钟
文件页数/大小: 752 页 / 2557 K
品牌: HITACHI [ HITACHI SEMICONDUCTOR ]
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Slave CPU  
Master CPU  
Write to ODR  
HIRQ output high  
HIRQ output low  
Interrupt initiation  
ODR read  
Write 1 to P4DR  
P4DR = 0?  
Yes  
No  
No  
All bytes  
transferred?  
Hardware operations  
Software operations  
Yes  
Figure 14.3 HIRQ Output Flowchart  
14.5  
Application Note  
The host interface provides buffering of asynchronous data from the host and slave processors, but  
an interface protocol must be followed to implement necessary functions and avoid data  
contention. For example, if the host and slave processors try to access the same input or output  
data register simultaneously, the data will be corrupted. Interrupts can be used to design a simple  
and effective protocol.  
333  
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