Bit 5—Parity Enable (PE): This bit selects whether to add a parity bit in asynchronous mode.
It is ignored in synchronous mode, and when a multiprocessor format is used.
Bit 5: PE
Description
0
Transmit: No parity bit is added.
Receive: Parity is not checked.
Transmit: A parity bit is added.
Receive: Parity is checked.
(Initial value)
1
Bit 4—Parity Mode (O/E ): In asynchronous mode, when parity is enabled (PE = 1), this bit
selects even or odd parity.
Even parity means that a parity bit is added to the data bits for each character to make the total
number of 1’s even. Odd parity means that the total number of 1’s is made odd.
This bit is ignored when PE = 0, or when a multiprocessor format is used. It is also ignored in
synchronous mode.
Bit 4: O/E
Description
Even parity
Odd parity
0
1
(Initial value)
Bit 3—Stop Bit Length (STOP): This bit selects the number of stop bits. It is ignored in
synchronous mode.
Bit 3: STOP
Description
0
One stop bit
(Initial value)
Transmit: One stop bit is added.
Receive: One stop bit is checked to detect framing errors.
Two stop bits
1
Transmit: Two stop bits are added.
Receive: The first stop bit is checked to detect framing errors. If the second
stop bit is a space (0), it is regarded as the next start bit.
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HITACHI [ HITACHI SEMICONDUCTOR ]
