Port 6 Data Direction Register (P6DDR)
Bit
7
6
5
4
3
2
1
0
P67DDR P66DDR P65DDR P64DDR P63DDR P62DDR P61DDR P60DDR
Initial value
Read/Write
0
0
0
0
0
0
0
0
W
W
W
W
W
W
W
W
P6DDR is an 8-bit register that controls the input/output direction of each pin in port 6. A pin
functions as an output pin if the corresponding P6DDR bit is set to 1, and as an input pin if this bit
is cleared to 0.
P6DDR is a write-only register. Read data is invalid. If read, all bits always read 1.
P6DDR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode
it retains its existing values, so if a transition to software standby mode occurs while a P6DDR bit
is set to 1, the corresponding pin remains in the output state.
If a transition to software standby mode occurs while port 6 is being used by the free-running
timer, the timer will be initialized, so the pin will revert to general-purpose input/output,
controlled by P6DDR and P6DR.
Port 6 Data Register (P6DR)
Bit
7
P67
0
6
P66
0
5
P65
0
4
P64
0
3
P63
0
2
P62
0
1
P61
0
0
P60
0
Initial value
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
P6DR is an 8-bit register that stores data for pins P67 to P60. When a P6DDR bit is set to 1, if port
6 is read, the value in P6DR is obtained directly, regardless of the actual pin state. When a P6DDR
bit is cleared to 0, if port 6 is read the pin state is obtained. This also applies to pins used as FRT
pins.
P6DR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode it
retains its existing values.
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HITACHI [ HITACHI SEMICONDUCTOR ]
