4.3.6
Interrupt Response Time
Table 4.4 indicates the number of states that elapse from an interrupt request signal until the first
instruction of the software interrupt-handling routine is executed. Since on-chip memory is
accessed 16 bits at a time, very fast interrupt service can be obtained by placing interrupt-handling
routines in on-chip ROM and the stack in on-chip RAM.
Table 4.4 Number of States before Interrupt Service
Number of States
No.
1
Reason for Wait
On-Chip Memory
2*3
External Memory
2*3
Interrupt priority decision
2
Wait for completion of current
instruction*1
1 to 13
5 to 17*2
3
4
5
6
Save PC and CCR
Fetch vector
4
12*2
6*2
12*2
2
Fetch instruction
Internal processing
Total
4
4
4
17 to 29
41 to 53*2
Notes: *1 These values do not apply if the current instruction is EEPMOV.
*2 If wait states are inserted in external memory access, add the number of wait states.
*3 1 for internal interrupts.
80
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