HANBit
HSD32M64D16H
CLK high pulse width
CLK low pulse width
Input setup time
tCH
tCL
2.5
2.5
1.5
0.8
1
3
3
2
1
1
3
3
2
1
1
ns
ns
ns
ns
ns
3
3
3
3
3
tSS
tSH
tSLZ
Input hold time
CLK to output in Low-Z
CLK to output
in Hi-Z
CAS
5.4
-
6
6
6
7
ns
ns
2
latency=3
CAS
tSHZ
latency=2
Notes :
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered
ie., [(tr + tf)/2-1]ns should be added to the parameter.
SIMPLIFIED TRUTH TABLE
/R
A
S
/C
A
S
D
Q
M
CKE
CKE
n
/C
S
/W
E
BA
0,1
A10/
AP
A11
A9~A0
n-1
COMMAND
NOTE
Register
Mode register set
Auto refresh
H
H
X
H
L
L
L
L
L
L
X
OP code
X
1,2
3
L
L
H
X
Entry
Self
3
Refresh
L
H
L
H
X
L
H
X
H
H
X
H
3
refresh
Exit
L
H
X
X
X
X
3
Bank active & row addr.
H
V
V
Row address
Auto
precharge
Read &
column
address
L
Column
Address
(A0 ~ A9)
4
disable
Auto
H
H
X
L
H
L
H
X
precharge
precharge
precharge
H
4,5
disable
Column
Address
(A0 ~ A9)
Auto
Write &
column
address
L
4
disable
X
L
H
L
L
X
V
Auto
H
4,5
6
enable
Burst Stop
Precharge
H
H
X
X
L
L
L
L
H
H
L
L
X
X
X
Bank selection
All banks
V
X
L
X
H
H
L
X
V
X
X
H
X
V
X
V
X
X
H
X
V
X
V
X
X
H
X
V
Entry
Exit
H
L
L
H
L
X
X
X
Clock suspend or
active power down
X
X
X
H
L
Entry
H
Precharge power
down mode
H
L
Exit
L
H
H
H
X
X
V
X
DQM
X
X
X
7
H
L
X
H
X
X
H
No operation command
H
(V=Valid, X=Don't care, H=Logic high, L=Logic low)
HANBit Electronics Co.,Ltd.
URL:www.hbe.co.kr
REV.1.0(August.2002)
- 8 -
HANBIT [ HANBIT ELECTRONICS CO.,LTD ]
