HANBit
HMNR328D(V)
WRITE Mode AC Characteristics
HMNR328D
-70
HMNR328D
-100
HMNR328DV
Symbol
Parameter(1)
Unit
-85
Min
Max
Min
Max
Min
Max
tAVAV
tAVWL
tAVEL
WRITE Cycle Time
70
0
100
0
85
0
nS
nS
nS
nS
nS
nS
nS
nS
Address Valid to WRITE Enable Low
Address Valid to Chip Enable Low
WRITE Enable Pulse Width
0
0
0
tWLWH
tELEH
tWHAX
tEHAX
tDVWH
50
55
0
80
80
10
10
50
55
60
0
Chip Enable Low to Chip Enable High
WRITE Enable High to Address Transition
Chip Enable High to Address Transition
Input Valid to WRITE Enable High
0
0
30
30
tDVEH
tWHDX
tEHDX
Input Valid to Chip Enable High
WRITE Enable High to Input Transition
Chip Enable High to Input Transition
WRITE Enable Low to Output High-Z
Address Valid to WRITE Enable High
Address Valid to Chip Enable High
WRITE Enable High to Output Transition
30
5
50
5
30
0
nS
nS
nS
nS
nS
nS
nS
5
5
0
(2,3)
tWLQZ
25
50
25
tAVWH
tAVEH
60
60
5
80
80
5
65
65
5
(2,3)
tWHQX
Note : 1. Valid for Ambient Operating Temperature: TA = 0 to 70°C; VCC = 4.5 to 5.5V or 3.0 to 3.6V (except where
noted).
2. CL = 5pF.
3. If /CE goes low simultaneously with /WE going low, the outputs remain in the high impedance state.
Data Retention Mode
With valid VCC applied, the HMNR328D(V) operates as a conventional Bytewide static RAM. Should the supply voltage
decay, the RAM will automatically deselect, write protecting itself when VCC falls between VPFD (max), VPFD (min) window.
All outputs become high impedance and all inputs are treated as “Don't care.”
Note : A power failure during a WRITE cycle may corrupt data at the current addressed location, but does not jeopardize
the rest of the RAM's content. At voltages below VPFD (min), the memory will be in a write protected state, provided the VCC
fall time is not less than tF. The HMNR328D(V) may respond to transient noise spikes on VCC that cross into the deselect
window during the time the device is sampling VCC. Therefore, decoupling of the power supply lines is recommended.
When VCC drops below VSO, the control circuit switches power to the internal battery, preserving data and powering the
clock. The internal energy source will maintain data in the HMNR328D(V) for an accumulated period of at least 10 years
at room temperature. As system power rises above VSO, the battery is disconnected, and the power supply is switched to
external VCC . Write protection continues until VCC reaches VPFD (min) plus tREC (min). Normal RAM operation can resume
tREC after VCC exceeds VPFD (max).
URL : www.hbe.co.kr
8
HANBit Electronics Co.,Ltd.
Rev. 0.0 (January, 2002)
HANBIT [ HANBIT ELECTRONICS CO.,LTD ]
