HANBit
HSD8M64D8A
OPERATING AC PARAMETER
(AC operating conditions unless otherwise noted)
VERSION
PARAMETER
SYMBOL
UNIT
-10L
NOTE
-13
15
20
20
45
-12
-10
20
20
20
50
Row active to row active delay
RAS to CAS delay
tRRD(min)
tRP(min)
16
20
20
48
20
20
20
50
ns
ns
ns
ns
1
1
1
1
Row precharge time
tRP(min)
tRAS(min)
tRAS(max)
Row active time
100
2
ns
Row cycle time
tRC(min)
tRDL(min)
tDAL(min)
tCDL(min)
tBDL(min)
tCCD(min)
65
68
70
70
ns
1
Last data in to row precharge
Last data in to Active delay
Last data in to new col. address delay
Last data in to burst stop
CLK
2.5
2 CLK + 20 ns
1
1
1
2
CLK
CLK
CLK
2
2
3
Col. address to col. address delay
CAS latency=3
CAS latency=2
Number of valid output data
ea
4
-
1
Notes :
1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time and
then rounding off to the next higher integer.
2. Minimum delay is required to complete write.
3. All parts allow every cycle column address change.
4. In case of row precharge interrupt, auto precharge and read burst stop.
.
AC CHARACTERISTICS
(AC operating conditions unless otherwise noted)
-13
-12
MAX MIN
-10
MAX MIN
-10L
MAX
PARAMETER
CAS
SYMBOL
UNIT
NOTE
MIN MAX MIN
7.5
-
8
-
10
10
10
12
latency=3
CAS
CLK cycle time
tCC
1000
1000
1000
1000
ns
1
latency=2
CAS
5.4
-
6
-
6
6
6
7
CLK to valid
output delay
latency=3
CAS
tSAC
ns
ns
1,2
latency=2
CAS
2.7
-
3
-
3
3
3
3
Output data
hold time
latency=3
CAS
tOH
2
latency=2
URL : www.hbe.co.kr
REV.1.0(August.2002)
- 7 -
HANBit Electronics Co.,Ltd.
HANBIT [ HANBIT ELECTRONICS CO.,LTD ]
