HANBit
HSD8M64D8A
CKE £ VIL(max), tCC=10ns
ICC3
P
3
3
Active standby current in
power-down mode
CKE&CLK £ VIL(max)
tCC=¥
mA
ICC3PS
CKE³ VIH(min),
CS*³ VIH(min), tCC=10ns
Input signals are changed
one time during 20ns
ICC3
N
25
15
Active standby current in
non power-down mode
(One bank active)
mA
CKE³ VIH(min)
CLK £VIL(max), tCC=¥
Input signals are stable
IO = 0 mA
ICC3NS
Page burst
Operating current
(Burst mode)
ICC4
115
135
110
130
95
95
mA
1
2
4Banks Activated
tCCD = 2CLKs
Refresh current
ICC5
ICC6
tRC ³ tRC(min)
CKE £ 0.2V
125
125
mA
mA
mA
1
Self refresh current
400
Notes :
1. Measured with outputs open.
2. Refresh period is 64ms.
3. Unless otherwise noticed, input swing level is CMOS(VIH/VIL=VDDQ/VSSQ).
AC OPERATING TEST CONDITIONS
(vcc = 3.3V ± 0.3V, TA = 0 to 70°C)
PARAMETER
Value
2.4/0.4
1.4
UNIT
AC Input levels (Vih/Vil)
V
Input timing measurement reference level
Input rise and fall time
V
tr/tf = 1/1
1.4
Ns
V
Output timing measurement reference level
Output load condition
See Fig. 2
+3.3V
V =1.4V
tt
50W
1200W
DOUT
Z0=50W
DOUT
870W
50pF
50pF*
V
V
(DC) = 2.4V, I = -2mA
OH
OH
(DC) = 0.4V, I = 2mA
OL
OL
(Fig. 2) AC output load circuit
(Fig. 1) DC output load
URL : www.hbe.co.kr
REV.1.0(August.2002)
- 6 -
HANBit Electronics Co.,Ltd.
HANBIT [ HANBIT ELECTRONICS CO.,LTD ]
