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GS8161Z36BT-200 参数 Datasheet PDF下载

GS8161Z36BT-200图片预览
型号: GS8161Z36BT-200
PDF下载: 下载PDF文件 查看货源
内容描述: 18MB流水线和流量通过同步NBT SRAM [18Mb Pipelined and Flow Through Synchronous NBT SRAM]
分类和应用: 存储内存集成电路静态存储器
文件页数/大小: 37 页 / 867 K
品牌: GSI [ GSI TECHNOLOGY ]
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Preliminary  
GS8161Z18B(T/D)/GS8161Z32B(D)/GS8161Z36B(T/D)  
JTAG TAP Instruction Set Summary  
Instruction  
EXTEST  
IDCODE  
Code  
000  
001  
Description  
Notes  
1
1, 2  
Places the Boundary Scan Register between TDI and TDO.  
Preloads ID Register and places it between TDI and TDO.  
Captures I/O ring contents. Places the Boundary Scan Register between TDI and  
SAMPLE-Z  
010  
011  
TDO.  
1
1
Forces all RAM output drivers to High-Z.  
Do not use this instruction; Reserved for Future Use.  
Replicates BYPASS instruction. Places Bypass Register between TDI and TDO.  
RFU  
SAMPLE/  
PRELOAD  
Captures I/O ring contents. Places the Boundary Scan Register between TDI and  
TDO.  
GSI private instruction.  
Do not use this instruction; Reserved for Future Use.  
Replicates BYPASS instruction. Places Bypass Register between TDI and TDO.  
100  
101  
110  
111  
1
1
1
1
GSI  
RFU  
BYPASS  
Places Bypass Register between TDI and TDO.  
Notes:  
1. Instruction codes expressed in binary, MSB on left, LSB on right.  
2. Default instruction automatically loaded at power-up and in test-logic-reset state.  
Rev: 1.00 9/2004  
30/37  
© 2004, GSI Technology  
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.  
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