GS4576C09/18/36L
576Mb LLDRAM II Datasheet Revision History
DS/DateRev. Code: Old;
New
Types of Changes
Format or Content
Page;Revisions;Reason
• Creation of new datasheet
• Revised Timing Diagrams
4576Cxx_r1
• Modified Cycle Time and Read/Write Latency tables (pg. 19,
4576Cxx_r1.00a
31.)
• Updated Operating Conditions (pg. 46), AC Electrical
Characteristics (pg. 48)
• Changed FBGA references to BGA (including diagrams)
4576Cxx_r1.00b
4576Cxx_r1.01
• Various changes to prepare for public release
• Added IDD Op Conditions
• (Rev1.02b: corrected mechanical drawing)
• (Rev1.02c: Editorial updates)
• (Rev1.02d: Updated NOP commands from 3000 to 2048)
• (Rev1.02e: Added Termal Impedance numbers for 4-layer
substrate)
4576Cxx_r1.02
• (Rev1.02f: Changed all V
references to V
)
SSQ
SS
• Changed DLL Reset to 1024 cycles (page 10)
• Corrected typos/wording errors in TAP section
• (Rev1.03a: Changed NOP time from 2048 to 1024)
4576Cxx_r1.03
4576Cxx_r1.04
• Updated to reflect MP status
Rev: 1.04 11/2013
62/62
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Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
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