GS9078A Data Sheet
5. Application Information
5.1 PCB Layout
Special attention must be paid to component layout when designing serial digital
interfaces for SDTV.
An FR-4 dielectric can be used, however, controlled impedance transmission lines
are required for PCB traces longer than approximately 1cm. Note the following
PCB artwork features used to optimize performance:
•
•
•
The PCB trace width for SD rate signals is closely matched to SMT
component width to minimize reflections due to changes in trace impedance.
The PCB groundplane is removed under the GS9078A output components to
minimize parasitic capacitance.
The PCB ground plane is removed under the GS9078A R
to minimize parasitic capacitance.
pin and resistor
SET
•
Input and output BNC connectors are surface mounted in-line to eliminate a
transmission line stub caused by a BNC mounting via high speed traces which
are curved to minimize impedance variations due to change of PCB trace
width.
5.2 Typical Application Circuit
*
5.6n
75
BNC
4u7
4u7
VCC
GS9078A
49.9
49.9
1
2
3
4
12
11
75
75
75
SDI
SDI
VEE
RSET
SDO
SDO
10n
10n
DIFFERENTIAL
DATA INPUT
9
VCC
BNC
*
5.6n
4u7
4u7
VCC
* TYPICAL VALUE: VARIES WITH LAYOUT
VCC
750
10n
NOTE: All resistors in Ohms, capacitors in Farads,
and inductors in Henrys, unless otherwise noted.
Figure 5-1: Typical Application Circuit
34165 - 4 March 2006
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