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GS9021-CTU 参数 Datasheet PDF下载

GS9021-CTU图片预览
型号: GS9021-CTU
PDF下载: 下载PDF文件 查看货源
内容描述: EDH协处理器 [EDH Coprocessor]
分类和应用:
文件页数/大小: 26 页 / 196 K
品牌: GENNUM [ GENNUM CORPORATION ]
 浏览型号GS9021-CTU的Datasheet PDF文件第1页浏览型号GS9021-CTU的Datasheet PDF文件第2页浏览型号GS9021-CTU的Datasheet PDF文件第3页浏览型号GS9021-CTU的Datasheet PDF文件第5页浏览型号GS9021-CTU的Datasheet PDF文件第6页浏览型号GS9021-CTU的Datasheet PDF文件第7页浏览型号GS9021-CTU的Datasheet PDF文件第8页浏览型号GS9021-CTU的Datasheet PDF文件第9页  
PIN CONNECTIONS  
64 63 62 61 60 59 58 5756 55 54 53 52 51 50 49  
DIN9  
DIN8  
DIN7  
DIN6  
DIN5  
DIN4  
DIN3  
1
48  
DOUT9  
DOUT8  
DOUT7  
DOUT6  
DOUT5  
DOUT4  
DOUT3  
2
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
3
4
5
6
7
GS9021  
TOP VIEW  
V
8
V
DD  
DD  
GND  
DIN2  
DIN1  
DIN0  
PCLKIN  
P7  
9
GND  
10  
11  
12  
13  
14  
15  
16  
DOUT2  
DOUT1  
DOUT0  
FLAG_MAP  
F_R/W  
FL4  
P6  
P5  
FL3  
17 18 19 20 21 22 23 2425 26 2728 29 30 3132  
PIN DESCRIPTIONS  
NUMBER  
1-7, 10-12  
13  
SYMBOL  
TYPE  
DESCRIPTION  
DIN[9:0]  
PCLKIN  
P[7:5]  
I
I
Parallel digital video data inputs.  
Parallel clock input.  
14-16  
I/O  
In parallel port mode, these are bits 7:5 of the host interface address/data bus. In  
I²C mode, these pins must be set LOW.  
17  
18  
SCL/P4  
SDA/P3  
I/O  
I/O  
I/O  
I
In parallel port mode, this is bit 4 of the host interface address/data bus. In I²C  
mode, this is the serial clock input for the I²C port.  
In parallel port mode, this is bit 3 of the host interface address/data bus. In I²C  
mode, this is the serial data pin for the I²C port.  
19-21  
22  
A[2:0]/P[2:0]  
R/W  
In parallel port mode, these are bits 2:0 of the host interface address/data bus. In  
I²C mode, these are input bits which define the I²C slave address for the device.  
Parallel port read/write control. When HIGH, the parallel port is configured as an  
output (read mode). When LOW, the parallel port is configured as an input (write  
mode). In I²C mode, this pin must be set HIGH.  
23  
24  
A/D  
CS  
I
I
Parallel port address/data bus control. When HIGH, the parallel port is used for  
address input. When LOW, the parallel port is used for data input or output. In  
I²C mode, this pin must be set LOW.  
Parallel port chip select. When CS is LOW and R/W is HIGH, the GS9021 drives  
the address/data bus. When CS is LOW and R/W is LOW, the user should drive  
the address/data bus. When CS is HIGH, the address/data bus is in a high  
impedance state (Hi - Z). In I²C mode, this pin must be set HIGH.  
25  
HOSTIF_MODE  
I
Host Interface mode select. When HIGH, the host interface is configured for I²C  
mode. When LOW, the host interface is configured for parallel port mode.  
4
521 - 65 - 05  
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