1. PIN CONNECTIONS
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
GND
VDDIO
DATA3
DATA4
DATA5
DATA6
DATA7
GND
RE
WE
CS
ADDR3
ADDR2
ADDR1
ADDR0
VDDINT
ANCI
PKTEN
PKT0
PKT1
PKT2
PKT3
PKT4
PKT5
PKT6
PKT7
PKT8
VDDIO
AUXEN
CSB
GS9023A
(TOP VIEW)
CSA
UDB
UDA
TRS
EDH_INS
MUTE
AM2
AM1
AM0
GND
ACLK
GND
VFLB
VFLA
SAFB
SAFA
GND
TEST
TEST
VDDINT
100
1
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
NOTE: The GS9023A DOUT[9:0] MSB to LSB convention is compatible with
the GS9022 but reversed with the GS9032 or GS7005.
See Interconnection with GS9032 or GS7005 section.
PIN DESCRIPTIONS
NUMBER
1, 17, 26, 90
2-4
SYMBOL
VDDINT
VM[2:0]
TYPE
DESCRIPTION
+3.3V power supply pins for core logic.
I
I
Video standard format. Used in conjunction with the TRS pin. VM[2] is the MSB
and VM[0] is the LSB. See Table 1.
5
DEMUX/MUX
Mode of operation. When set HIGH, the GS9023A operates in Demultiplex Mode.
When set LOW, the GS9023A operates in Multiplex Mode.
NOTE: A device reset must be performed when switching between Multiplex and
Demultiplex Modes while the device is powered up.
6-10,12-16
DIN[9:0]
GND
I
I
Parallel digital video signal input. DIN[9] is the MSB and DIN[0] is the
LSB. The digital video input must contain TRS information.
Device ground.
11, 23, 25, 29,
50, 58, 71, 82,
98, 100
18
RESET
Device reset. Active low.
NOTE: The video input to output data path will be interrupted during device
reset.
GENNUM CORPORATION
19795 - 6
4 of 37
GENNUM [ GENNUM CORPORATION ]
