欢迎访问ic37.com |
会员登录 免费注册
发布采购

GS9020ACTV 参数 Datasheet PDF下载

GS9020ACTV图片预览
型号: GS9020ACTV
PDF下载: 下载PDF文件 查看货源
内容描述: GENLINX -TM II GS9020A串行数字视频输入处理器 [GENLINX -TM II GS9020A Serial Digital Video Input Processor]
分类和应用:
文件页数/大小: 31 页 / 403 K
品牌: GENNUM [ GENNUM CORPORATION ]
 浏览型号GS9020ACTV的Datasheet PDF文件第7页浏览型号GS9020ACTV的Datasheet PDF文件第8页浏览型号GS9020ACTV的Datasheet PDF文件第9页浏览型号GS9020ACTV的Datasheet PDF文件第10页浏览型号GS9020ACTV的Datasheet PDF文件第12页浏览型号GS9020ACTV的Datasheet PDF文件第13页浏览型号GS9020ACTV的Datasheet PDF文件第14页浏览型号GS9020ACTV的Datasheet PDF文件第15页  
2.4 FIFO Reset Pulse  
For composite based standards, the V output signal is  
asserted HIGH as described in the following table:  
PIN  
LOGIC OPR  
HOST BIT  
VBLANKS/L=1  
VBLANKS/L=0  
FIFOE/S  
NTSC  
Composite  
from Line 525/ Sample  
768 to Line 9/ Sample  
767 inclusive  
from Line 525/ Sample  
768 to Line 19/ Sample  
767 inclusive  
FIFO_RESET  
AND  
AND  
The GS9020A also provides a FIFO_RESET pulse on the  
FIFO_RESET output pin. This pin is always HIGH except  
when the TRSID word is exiting the device as shown in  
Figure 9. For component standards, a FIFOE/S input pin is  
used to determine if the FIFO_RESET pulse occurs during  
the EAV or SAV word of the outgoing data.  
from Line 263/ Sample  
313 to Line 272/  
Sample 767 inclusive  
from Line 263/ Sample  
313 to Line 282/  
Sample 767 inclusive  
VBLANKS/L=1  
VBLANKS/L=0  
PAL  
Composite  
from Line 623/ Sample  
382 to Line 5/ Sample  
947 inclusive  
from Line 623/ Sample  
382 to Line 15/ Sample  
947 inclusive  
If FIFOE/S is HIGH, the active low pulse of the FIFO_RESET  
output pin occurs during the EAV word. If FIFOE/S is LOW,  
the active low output pulse occurs during the SAV word. For  
composite signals the FIFOE/S pin has no effect since there  
is only one TRS-ID word per line. This feature is useful for  
synchronizing line store FIFOs that follow the GS9020A.  
AND  
AND  
from Line 310/ Sample  
948 to Line 317/  
Sample 947 inclusive  
from Line 310/ Sample  
948 to Line 327/  
Sample 947 inclusive  
2.3 TRS Errors  
3. EDH PROCESSING BLOCK  
This section describes the GS9020A’s EDH features and  
functionality.  
PIN  
LOGIC OPR  
HOST BIT  
TRS_ERR  
TRS_ERR  
3.1 Error Flags  
PIN  
LOGIC OPR  
HOST BIT  
INCOMING ERROR FLAGS  
OUTGOING ERROR FLAGS  
STICKY IN  
The flywheel is used to indicate TRS errors. These errors  
are detected by comparing the TRS in the incoming data  
stream with the expected TRS based on the internal  
flywheel. If a mismatch occurs, the TRS_ERR signal is  
immediately set HIGH and maintained HIGH until a correct  
TRS occurs. The types of TRS errors detected are:  
STICKY OUT  
TRS missing  
OVERWRITE VALUES  
OVERWRITE CONTROL  
RO_CTRL  
TRS in wrong location  
TRS-ID is different from the one generated by the  
flywheel  
RESERVED WORDS (INCOMING)  
RESERVED WORDS (OUTGOING)  
The TRS_ERR signal is available as an output pin and via  
the HOSTIF read table. The TRS_ERR signal should only be  
considered valid if the flywheel is enabled.  
All 15 EDH error flags can be read from the HOSTIF read  
table. The INCOMING ERROR FLAGS represent the EDH  
error flags present in the incoming EDH packet. The  
OUTGOING ERROR FLAGS represent the EDH error flags  
present in the outgoing EDH packet (after modification by  
the GS9020A). Please note that the EDH flags can also be  
accessed using the flag port as described later.  
The INCOMING and OUTGOING ERROR FLAGS, the  
incoming Validity bits (FFV and APV), and the EDH_CHKSM  
bit can be made "sticky".  
11 of 31  
19922 - 3