The counter can be programmed either to clear automatically
when the counter status is read via the interface, or to clear
when forced through the interface.
During the stand-alone mode of operation, flag masking,
videostandardoverrideandprogrammableinterruptfeatures
aredisabled.Theusercanstillmonitorthevideostandardand
the error flags through dedicated pins as shown in Table 2.
I2CSerialCommunicationsInterface
EDHPassthroughMode
The serial communications interface allows access to all error
flags and other internal programmable functions. The Inter-
Integrated Circuit (I2C) protocol is used. For information on
the GS9001 I2C protocol, refer to Document 521 - 59 "Using
the GS9001 EDH Coprocessor".
An EDH passthrough mode is available to aid in system
diagnostics. This mode is selected by address 1,0 on A1, A0
pins. In this mode, the GS9001 will not insert a new EDH
packet into the data stream. Input data is bypassed to output
without modification. Error flag status available through the
I2C interface and output pins, is now invalid. However, valid
CRC words can be read through the I2C interface every field,
for a static picture.
The slave addresses for the I2C interface are given in Table 3.
DataformatsfortheI2CinterfaceREADandWRITEoperations
are given in Tables 4 and 5.
Table 3. I2C Slave Addresses
I2C Address is 00011A1 A0
A1
0
A0
0
Function
Available Device Address
Available Device Address
EDH Passthrough Mode
Test Mode
0
1
1
0
1
1
NOTE:
If an I2C interface is not used, address 0, 1 will force TRS-ID indication on the ancillary data pin. This is to facilitate
applications in which TRS-ID is desired, but an I2C interface is not used. In this case, the SCL clock line must be
connected to the most negative supply.
521 - 38 - 04
7 of 14
GENNUM [ GENNUM CORPORATION ]
