GS1574A Data Sheet
Table 1-1: GS1574A Pin Descriptions (Continued)
Pin Number
Name
Timing
Type
Description
9
VEE_D
Analog
Power
Most negative power supply for the digital circuitry and output buffer.
Connect to GND.
10, 11
12
SDO, SDO
VEE_D
Analog
Analog
Output
Power
Equalized serial digital differential output.
Most negative power supply for the digital circuitry and output buffer.
Connect to GND.
13
14
VCC_D
MUTE
Analog
Power
Input
Most positive power supply for the digital I/O pins of the device.
Connect to +3.3V DC.
Not
CONTROL SIGNAL INPUT
Synchronous
levels are LVCMOS/LVTTL compatible. (3.3V Tolerant)
When the MUTE pin is set HIGH by the application interface, the serial
digital output of the device will be forced to a steady state.
When the MUTE pin is set LOW, the serial digital output of the device
will be active.
NOTE: This pin may be connected directly to the CD pin to allow mute
on loss of carrier.
15
CD
Not
Output
STATUS SIGNAL OUTPUT
Synchronous
Signal levels are LVCMOS/LVTTL compatible.
Indicates the presence of a good input signal.
When the CD pin is LOW, a good input signal has been detected.
When this pin is HIGH, the input signal is invalid.
This pin will indicate loss of carrier for data rates > 19Mb/s.
16
–
VCC_A
Analog
–
Power
Power
Most positive power supply for the analog circuitry of the device.
Connect to +3.3V DC.
Center Pad
Internally bonded to VEE_A.
33416 - 5 March 2006
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GENNUM [ GENNUM CORPORATION ]
