GS1574A Data Sheet
1. Pin Out
1.1 GS1574A Pin Assignment
15
14
16
13
VEE_A
1
12
V
EE_D
SDI
SDI
11
10
2
3
SDO
SDO
GS1574A
(top view)
4
9
V
EE_D
VEE_A
7
5
6
8
Center Pad
(bottom of package, internally
bonded to VEE_A)
Figure 1-1: 16-Pin QFN
1.2 GS1574A Pin Descriptions
Table 1-1: GS1574A Pin Descriptions
Pin Number
Name
Timing
Type
Description
1, 4
VEE_A
Analog
Power
Most negative power supply for analog circuitry.
Connect to GND.
2, 3
5, 6
SDI, SDI
Analog
Analog
Input
–
Serial digital differential input.
AGC, AGC
External AGC capacitor.
Connect pin 5 and pin 6 together as shown in the Typical Application
Circuit on page 13.
7
8
BYPASS
MCLADJ
Not
Synchronous
Input
Input
Forces the Equalizing and DC RESTORE stages into bypass mode
when HIGH. No equalization occurs in this mode.
Analog
Maximum cable length adjust.
Adjusts the approximate maximum amount of cable to be equalized
(from 0m to the maximum cable length). The output is muted (latched to
the last state) when the maximum cable length is achieved.
NOTE: MCLADJ is only recommended for data rates up to 360Mb/s.
For data rates above this, MCLADJ should be left floating.
33416 - 5 March 2006
3 of 16
GENNUM [ GENNUM CORPORATION ]
