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GS1532-CF 参数 Datasheet PDF下载

GS1532-CF图片预览
型号: GS1532-CF
PDF下载: 下载PDF文件 查看货源
内容描述: 多速率串行器与ClockCleaner [Multi-Rate Serializer with ClockCleaner]
分类和应用:
文件页数/大小: 51 页 / 775 K
品牌: GENNUM [ GENNUM CORPORATION ]
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GS1532 Data Sheet
1.2 Pin Descriptions
Table 1-1: Pin Descriptions
Pin
Number
1
2
3
4, 6-8, 10,
14-17, 31,
65, 66, 70,
71
5
9
Name
CP_VDD
PD_GND
PD_VDD
NC
Timing
Type
Power
Power
Power
Description
Power supply connection for the charge pump. Connect to +3.3V DC
analog.
Ground connection for the phase detector. Connect to analog GND.
Power supply connection for the phase detector. Connect to +1.8V DC
analog.
No connect.
RSV
DVB_ASI
Non
Synchronous
Input
Reserved. Connect to Analog GND.
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
When set HIGH in conjunction with SD/HD = HIGH and SMPTE_BYPASS
= LOW, the device will be configured to operate in DVB-ASI mode.
When set LOW, the device will not support the encoding of received
DVB-ASI data.
11
SD/HD
Non
Synchronous
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
When set LOW, the device will be configured to transmit signal rates of
1.485Gb/s or 1.485/1.001Gb/s only.
When set HIGH, the device will be configured to transmit signal rates of
270Mb/s only.
12
20bit/10bit
Non
Synchronous
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Used to select the input data bus width in SMPTE or Data-Through
modes. This signal is ignored in DVB-ASI mode.
When set HIGH, the parallel input will be 20-bit demultiplexed data.
When set LOW, the parallel input will be 10-bit multiplexed data.
21498 - 8
February 2007
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