GS1535 Data Sheet
1.2 Pin Descriptions
Table 1-1: Pin Descriptions
Pin
Number
1, 3
2
5, 7
6
9, 11
10
13, 15
14
17, 18
Name
DDI0, DDI0
DDI0_VTT
DDI1,DDI1
DDI1_VTT
DDI2, DDI2
DDI2_VTT
DDI3, DDI3
DDI3_VTT
DDI_SEL[1:0]
Type
INPUT
PASSIVE
INPUT
PASSIVE
INPUT
PASSIVE
INPUT
PASSIVE
LOGIC INPUT
Description
Serial digital differential input 0.
Center tap of two 50Ω on-chip termination resistors between DDI0 and DDI0.
Serial digital differential input 1.
Center tap of two 50Ω on-chip termination resistors between DDI1 and DDI1.
Serial digital differential input 2.
Center tap of two 50Ω on-chip termination resistors between DDI2 and DDI2.
Serial digital differential input 3 .
Center tap of two 50Ω on-chip termination resistors between DDI3 and DDI3.
Serial digital input select.
DDI_SEL1
0
0
1
1
DDI_SEL0
0
1
0
1
INPUT
SELECTED
DDI0
DDI1
DDI2
DDI3
19
20
BYPASS
AUTOBYPASS
LOGIC INPUT
LOGIC INPUT
Bypasses the reclocker stage (Active HIGH). When BYPASS is HIGH, it
overwrites the AUTOBYPASS setting.
Automatically bypasses the reclocker stage when the PLL is not locked
(Active HIGH).
21
AUTO/MAN
LOGIC INPUT
When active, the standard is automatically detected from the input data rate.
18557 - 8
February 2005
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