欢迎访问ic37.com |
会员登录 免费注册
发布采购

GS1531-CBE2 参数 Datasheet PDF下载

GS1531-CBE2图片预览
型号: GS1531-CBE2
PDF下载: 下载PDF文件 查看货源
内容描述: GS1531 HD- LINX -TM II多速率串行器 [GS1531 HD-LINX-TM II Multi-Rate Serializer]
分类和应用: 消费电路商用集成电路
文件页数/大小: 49 页 / 853 K
品牌: GENNUM [ GENNUM CORPORATION ]
 浏览型号GS1531-CBE2的Datasheet PDF文件第36页浏览型号GS1531-CBE2的Datasheet PDF文件第37页浏览型号GS1531-CBE2的Datasheet PDF文件第38页浏览型号GS1531-CBE2的Datasheet PDF文件第39页浏览型号GS1531-CBE2的Datasheet PDF文件第41页浏览型号GS1531-CBE2的Datasheet PDF文件第42页浏览型号GS1531-CBE2的Datasheet PDF文件第43页浏览型号GS1531-CBE2的Datasheet PDF文件第44页  
GS1531 Data Sheet  
4.10 GSPI Host Interface  
The GSPI, or Gennum Serial Peripheral Interface, is a 4-wire interface provided to  
allow the host to enable additional features of the device and /or to provide  
additional status information through configuration registers in the GS1531.  
The GSPI comprises a serial data input signal SDIN, serial data output signal  
SDOUT, an active low chip select CS, and a burst clock SCLK. The burst clock  
must have a duty cycle between 40% and 60%.  
Because these pins are shared with the JTAG interface port, an additional control  
signal pin JTAG/HOST is provided. When JTAG/HOST is LOW, the GSPI interface  
is enabled.  
When operating in GSPI mode, the SCLK, SDIN, and CS signals are provided by  
the host interface. The SDOUT pin is a high-impedance output allowing multiple  
devices to be connected in parallel and selected via the CS input. The interface is  
illustrated in the Figure 4-5 below.  
All read or write access to the GS1531 is initiated and terminated by the host  
processor. Each access always begins with a 16-bit command word on SDIN  
indicating the address of the register of interest. This is followed by a 16-bit data  
word on SDIN in write mode, or a 16-bit data word on SDOUT in read mode.  
Application Host  
SCLK  
GS1531  
SCLK  
SDIN  
SDOUT  
CS  
CS  
SDIN  
SDOUT  
Figure 4-5: Gennum Serial Peripheral Interface (GSPI)  
4.10.1 Command Word Description  
The command word is transmitted MSB first and contains a read/write bit, nine  
reserved bits and a 6-bit register address. Set R/W = '1' to read and R/W = '0' to  
write from the GSPI.  
Command words are clocked into the GS1531 on the rising edge of the serial clock  
SCLK. The appropriate chip select signal, CS, must be asserted low a minimum of  
1.5ns (t0 in Figure 4-8 and Figure 4-9) before the first clock edge to ensure proper  
operation.  
Each command word must be followed by only one data word to ensure proper  
operation.  
30573 - 4 July 2005  
40 of 49