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GS1531-CBE2 参数 Datasheet PDF下载

GS1531-CBE2图片预览
型号: GS1531-CBE2
PDF下载: 下载PDF文件 查看货源
内容描述: GS1531 HD- LINX -TM II多速率串行器 [GS1531 HD-LINX-TM II Multi-Rate Serializer]
分类和应用: 消费电路商用集成电路
文件页数/大小: 49 页 / 853 K
品牌: GENNUM [ GENNUM CORPORATION ]
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GS1531 HD-LINX™ II  
Multi-Rate Serializer  
GS1531 Data Sheet  
Key Features  
Description  
SMPTE 292M and SMPTE 259M-C compliant  
scrambling and NRZ NRZI encoding (with  
bypass)  
The GS1531 is a multi-standard serializer with an  
integrated cable driver. When used in conjunction with  
the GO1525 Voltage Controlled Oscillator, a transmit  
solution can be realized for HD-SDI, SD-SDI and  
DVB-ASI applications.  
DVB-ASI sync word insertion and 8b/10b encoding  
Superior rejection of jitter on input PCLK  
The device features an internal PLL, which can be  
configured for loop bandwidth as narrow as 100kHz.  
Thus the GS1531 can tolerate substantive jitter on the  
input PCLK and still provide output jitter well within  
SMPTE specification. Connect the output clocks from  
Gennum’s GS4911 clock generator directly to the  
GS1531’s PCLK input and configure the GS1531’s loop  
bandwidth accordingly.  
user selectable additional processing features  
including:  
CRC, ANC data checksum, and line number  
calculation and insertion  
TRS and EDH packet generation and insertion  
illegal code remapping  
internal flywheel for noise immune TRS generation  
20-bit / 10-bit CMOS parallel input data bus  
In addition to serializing the input, the GS1531 performs  
NRZ-to-NRZI encoding and scrambling as per SMPTE  
292M/259M-C when operating in SMPTE mode. When  
operating in DVB-ASI mode, the device will insert K28.5  
sync characters and 8b/10b encode the data prior to  
serialization.  
148.5MHz / 74.25MHz / 27MHz / 13.5MHz parallel  
digital input  
automatic standards detection and indication  
1.8V core power supply and 3.3V charge pump  
power supply  
Parallel data inputs are provided for 10-bit multiplexed  
or 20-bit demultiplexed formats at both HD and SD  
signal rates. An appropriate parallel clock input signal is  
also required.  
3.3V digital I/O supply  
JTAG test interface  
Available in a Pb-free package  
small footprint (11mm x 11mm)  
The integrated cable driver features an output mute on  
loss of parallel clock, high impedance mode, adjustable  
signal swing, and automatic dual slew rate selection  
depending on HD/SD operational requirements.  
Applications  
SMPTE 292M Serial Digital Interfaces  
SMPTE 259M-C Serial Digital Interfaces  
DVB-ASI Serial Digital Interfaces  
The GS1531 also includes a range of data processing  
functions including automatic standards detection and  
EDH support. The device can also insert TRS signals,  
calculate and insert line numbers and CRC’s, re-map  
illegal code words and insert SMPTE 352M payload  
identifier packets. All processing features are optional  
and may be enabled/disabled via external control pin(s)  
and/or host interface programming.  
30573 - 4 July 2005  
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