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GL852-HONXX 参数 Datasheet PDF下载

GL852-HONXX图片预览
型号: GL852-HONXX
PDF下载: 下载PDF文件 查看货源
内容描述: [USB Bus Controller, CMOS]
分类和应用: 外围集成电路
文件页数/大小: 34 页 / 498 K
品牌: GENESYS [ GENESYS LOGIC ]
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GL852 USB 2.0 MTT HUB Controller  
5.2.6 Power Switch Enable Polarity (Not available for QFN 28 package)  
Both low/high-enabled power switches are supported. It is determined by jumper setting, based on the state  
of pin AMBER2, as the following table:  
Table 5.2 – Configuration by power switch type  
AMBER2  
Power switch enable polarity  
Low-active  
0
1
High-active  
5.2.7 Port number configuration (Not available for QFN 28 package)  
Number of downstream port can be configured as 2/3/4 ports by pin strapping in addition to EEPROM,  
based on the state of pin AMBER 3, AMBER 4, as the following table:  
Table 5.3 – Port number configuration  
AMBER3  
AMBER 4  
Port number  
1
0
0
0
1
0
2
3
4
5.2.8 Non-removable port configuration (Not available for QFN 28 package)  
For compound application or embedded system, downstream ports that always connected inside the system  
can be set as non-removable based on the state of corresponding status LED, pin GREEN 1~4. If the pin is  
pull high in the initial stage (POR reset), the corresponding port will be set as non-removable.  
5.2.9 Reference clock configuration (Not available for QFN 28 package)  
GL852 can support optional 27/48MHz clock source, which is selectable through GPIO configurations.  
For some on-board design that 27/48MHz clock source is available, such as motherboard or Monitor  
built-in applications, system integrator can leverage this feature to further reduce BOM cost by removing  
external crystal.  
Table 5.4 – Ref. Clock configuration  
SEL48  
SEL27  
Clock source  
48MHz OSC-in  
0
1
1
1
0
1
27MHz OSC-in  
12MHz X’tal/OSC-in  
©2000-2009 Genesys Logic Inc. - All rights reserved.  
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