GL850A USB 2.0 Low-Power HUB Controller
CHAPTER 2 FEATURES
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Compliant to USB specification Revision 2.0
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4 downstream ports
Upstream port supports both high-speed (HS) and full-speed (FS) traffic
Downstream ports support HS, FS, and low-speed (LS) traffic
1 control pipe (endpoint 0, 64-byte data payload) and 1 interrupt pipe (endpoint 1, 1-byte data payload)
Backward compatible to USB specification Revision 1.1
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On-chip 8-bit micro-processor
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RISC-like architecture
USB optimized instruction set
Dual cycle instruction execution
Performance: 6 MIPS @ 12MHz
With 64-byte RAM and 2K internal ROM
Support customized PID, VID by reading external EEPROM
Support downstream port configuration by reading external EEPROM
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Single Transaction Translator (STT)
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Single TT shares the same TT control logics for all downstream port devices. This is the most cost
effective solution for TT. Multiple TT provides individual TT control logics for each downstream port.
This is a performance better choice for USB 2.0 hub. Please refer to GL852 datasheet for more
detailed information.
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Each downstream port supports two-color status indicator, with automatic and manual modes compliant to
USB specification Revision 2.0
Support both individual and gang modes of power management and over-current detection for
downstream ports (64-pin LQFP)
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Support gang mode of power management and over-current detection for downstream ports
Conform to bus power requirements
Automatic switching between self-powered and bus-powered modes
Integrate USB 2.0 transceiver
PLL embedded with external 12 MHz crystal
Operate on 3.3 Volts
Embed serial resister for USB signals and integrate pull-up resister for upstream USB signal
Improve output drivers with slew-rate control for EMI reduction
Internal power-fail detection for ESD recovery
64/48-pin LQFP package
Applications:
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Stand-alone USB hub
PC motherboard USB hub, Docking of notebook
Any compound device to support USB HUB function
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