GL811S USB2.0 to ATA/ATAPI Bridge Controller
B
B
15
16
DD7
NC
B
31 X_POWER
32 XO
P
47
INTRQ
I
63
64
F_LED
H_LED
B
48 DMACK_
O
3.3 Pin Descriptions
Table 3.3 – 48 Pin Descriptions
USB Interface
Pin Name
VREF
Pin#
Type
Description
21
18
19
24
25
A
B
B
B
I
Reference Resistor
HS D-
DM
DP
XO
XI
HS D+
Crystal output
Crystal input
External reset
I
15
26
RESET#
TEST
(pu)
I
(pd)
Test mode Input
ATA/ATAPI Interface
Pin Name
Pin#
Type
Description
43,45,47,
2,5,8,10,1
2,11,9,6,4,
1,46,44,
41,
B
(pd)
DD0~15
IDE Data Bus
HD_RST#
CS1_, CS0_
DA0~2
13
O
O
O
Device Reset
27,31
Chip Select #1,#0
IDE Address #2,#1,#0
33,34,32
I
INTRQ
35
36
37
IDE interrupt input
IDE Acknowledge
IDE Ready
(pd)
DMACK_
IORDY
O
I
(pu)
DIOR_
DIOW_
38
39
O
O
IDE read signal
IDE write signal
I
DMARQ
40
IDE request
(pd)
©2006 Genesys Logic Inc. - All rights reserved.
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