MBM29LV400TC-70/-90/-12/MBM29LV400BC-70/-90/-12
Data Polling
3rd Bus Cycle
Addresses
555H
PA
PA
t WC
t RC
t AS
t AH
CE
t CH
t CS
t CE
OE
t WP
t WPH
t OE
t GHWL
t WHWH1
WE
t OH
t DS
t DH
A0H
PD
DQ 7
D OUT
D OUT
Data
Notes: 1. PA is address of the memory location to be programmed.
2. PD is data to be programmed at byte address.
3. DQ7 is the output of the complement of the data written to the device.
4. DOUT is the output of the data written to the device.
5. Figure indicates last two bus cycles out of four bus cycle sequence.
6. These waveforms are for the ×16 mode. (The addresses differ from ×8 mode.)
Figure 6 AC Waveforms for Alternate WE Controlled Program Operations
36
FUJITSU [ FUJITSU ]
