MB90540/540G/545/545G Series
■ PIN DESCRIPTION
Pin No.
Pin name
Circuit type
Function
LQFP*2
QFP*1
80
81
82
83
X0
X1
A
High speed crystal oscillator input pins
(Oscillation)
Low speed crystal oscillator input pins. For the one clock sys-
tem parts, perfom external pull-down processing.
78
77
80
79
X0A
X1A
A
(Oscillation)
Low speed crystal oscillator input pins. For the one clock sys-
tem parts, leave it open.
75
50
77
52
RST
HST
B
C
External reset request input pin
Hardware standby input pin
General I/O port with programmable pullup. This function is
enabled in the single-chip mode.
P00 to P07
AD00 to AD07
P10 to P17
83 to 90 85 to 92
91 to 98 93 to 100
I
I
I/O pins for 8 lower bits of the external address/data bus. This
function is enabled when the external bus is enabled.
General I/O port with programmable pullup. This function is
enabled in the single-chip mode.
I/O pins for 8 higher bits of the external address/data bus. This
function is enabled when the external bus is enabled.
AD08 to AD15
General I/O port with programmable pullup. In external bus
mode, this function is valid when the corresponding bits in the
external address output control resister (HACR) are set to “1”.
P20 to P27
A16 to A23
99 to 6
1 to 8
I
8-bit I/O pins for A16 to A23 at the external address/data bus.
In external bus mode, this function is valid when the corre-
sponding bits in the external address output control resister
(HACR) are set to “0”.
General I/O port with programmable pullup. This function is
enabled in the single-chip mode.
P30
ALE
P31
RD
7
8
9
I
I
Address latch enable output pin. This function is enabled
when the external bus is enabled.
General I/O port with programmable pullup. This function is
enabled in the single-chip mode.
10
Read strobe output pin for the data bus. This function is en-
abled when the external bus is enabled.
General I/O port with programmable pullup. This function is
enabled in the single-chip mode or when the WR/WRL pin out-
put is disabled.
P32
WRL
Write strobe output pin for the data bus. This function is en-
abled when both the external bus and the WR/WRL pin output
are enabled. WRL is write-strobe output pin for the lower 8 bits
of the data bus in 16-bit access. WR is write-strobe output pin
for the 8 bits of the data bus in 8-bit access.
10
12
I
WR
(Continued)
9
FUJITSU [ FUJITSU ]
