MB90480/485 Series
(1) 16-bit Free Run Timer
The 16-bit free run timer is composed of a 16-bit up-down counter and control status register.
The counter value of this timer is used as the base timer for the input capture and output compare.
• The counter operation provides a choice of eight clock types.
• A counter overflow interrupt can be produced.
• A mode setting is available to initialize the counter value whenever the output compare value matches the
value in the compare clear register.
• Register List
Compare clear register (CPCLR)
Initial value
15
14
13
12
11
10
9
8
000067H
XXXXXXXXB
CL15
R/W
CL14
R/W
CL13
R/W
CL12
R/W
CL11
R/W
CL10
R/W
CL09
R/W
CL08
R/W
Initial value
7
6
5
4
3
2
1
0
000066H
XXXXXXXXB
CL07
R/W
CL06
R/W
CL05
R/W
CL04
R/W
CL03
R/W
CL02
R/W
CL01
R/W
CL00
R/W
Timer counter data register (TCDT)
Initial value
00000000B
15
14
13
12
11
10
9
8
000063H
T15
T14
T13
R/W
T12
R/W
T11
R/W
T10
R/W
T09
R/W
T08
R/W
R/W
R/W
Initial value
00000000B
7
6
5
4
3
2
1
0
000062H
T07
R/W
T06
R/W
T05
R/W
T04
R/W
T03
R/W
T02
R/W
T01
R/W
T00
R/W
Timer control status register (TCCS)
Initial value
0--00000B
15
14
13
⎯
12
11
10
9
8
000065H
ECKE
⎯
MSI2
R/W
MSI1
R/W
MSI0
R/W
ICLR
R/W
ICRE
R/W
R/W
R/W
R/W
Initial value
00000000B
7
6
5
4
3
2
1
0
000064H
IVF
R/W
IVFE
R/W
STOP MODE SCLR
R/W R/W R/W
CLK2
R/W
CLK1
R/W
CLK0
R/W
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