MB90480/485 Series
■ PERIPHERAL RESOURCES
1. I/O Ports
The I/O ports perform the functions of either sending data from the CPU to the I/O pins, or loading information
from the I/O into the CPU, according to the setting of the corresponding port data register (PDR) . The input/
output direction of each I/O pin can be set in individual bit units by the port direction register (DDR) for each I/
O port.
The MB90480/485 series has 84 input/output pins. The I/O ports are port 0 through port A.
(1) Port Data Registers
PDR0
Initial value Access
Undefined R/W*1
7
6
5
4
3
2
1
0
Address : 000000H
P07
P06
P05
P04
P03
P02
P01
P00
PDR1
7
6
5
4
3
2
1
0
Address : 000001H
Undefined R/W*1
Undefined R/W*1
Undefined R/W*1
Undefined R/W*1
Undefined R/W*1
Undefined R/W*1
Undefined*2 R/W*1
Undefined R/W*1
Undefined R/W*1
Undefined R/W*1
P17
P16
P15
P14
P13
P12
P11
P10
PDR2
7
6
5
4
3
2
1
0
Address : 000002H
P27
P26
P25
P24
P23
P22
P21
P20
PDR3
7
6
5
4
3
2
1
0
Address : 000003H
P37
P36
P35
P34
P33
P32
P31
P30
PDR4
7
6
5
4
3
2
1
0
Address : 000004H
P47
P46
P45
P44
P43
P42
P41
P40
PDR5
7
6
5
4
3
2
1
0
Address : 000005H
P57
P56
P55
P54
P53
P52
P51
P50
PDR6
7
6
5
4
3
2
1
0
Address : 000006H
P67
P66
P65
P64
P63
P62
P61
P60
PDR7
7
6
5
4
3
2
1
0
Address : 000007H
P77
P76
P75
P74
P73
P72
P71
P70
PDR8
7
6
5
4
3
2
1
0
Address : 000008H
P87
P86
P85
P84
P83
P82
P81
P80
PDR9
7
6
5
4
3
2
1
0
Address : 000009H
P97
P96
P95
P94
P93
P92
P91
P90
PDRA
7
6
5
4
3
2
1
0
Address : 00000AH
⎯
⎯
⎯
⎯
PA3
PA2
PA1
PA0
*1 : The R/W indication for I/O ports is somewhat different than R/W access to memory, and involves the following
operations.
• Input mode
Read : Reads the corresponding signal pin level.
Write : Writes to the output latch.
• Output mode
Read : Reads the value from the data register latch.
Write : Outputs the value to the corresponding signal pin.
*2 : The initial value of this bit is “11XXXXXXB” on MB90485 series.
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