MB39A104
(Continued)
(VCC
=
VCCO
=
12 V, VREF
=
0 mA, Ta
= +25 °C)
Symbol
BW
V
OH
V
OL
I
SOURCE
I
SINK
V
T0
Threshold voltage
V
T100
Input current
ILIM terminal input
current
Offset voltage
I
DTC
I
LIM
6, 19
6, 19
5, 20
Duty cycle
=
Dtr
DTC1
=
DTC2
=
0.4 V
RT
=
24 kΩ, CT
=
100 pF
−2.0
99
2.5
−0.6
110
2.6
121
V
µA
µA
Pin No.
9, 16
9, 16
9, 16
9, 16
9, 16
6, 19
Conditions
A
V
=
0 dB
FB1
=
FB2
=
2 V
FB1
=
FB2
=
2 V
Duty cycle
=
0
%
Value
Min
4.7
150
1.4
Typ
1.6*
4.9
40
−2
200
1.5
Max
200
−1
Unit
MHz
V
mV
mA
µA
V
Parameter
11.Bias 10.Overcurrent 9.PWM comparator
8.Error amplifier bolck
voltage protection circuit
block
[Error Amp1,
block
block
[PWM Comp.1,
Error Amp2]
[VH]
[OCP1, OCP2]
PWM Comp.2]
Frequency
bandwidth
Output voltage
Output source
current
Output sink current
V
IO
5, 20
1*
mV
Output voltage
V
H
2
VCC
=
VCCO
=
7 V to 19 V
V
CC
−
V
CC
−
V
CC
−
VH
=
0 mA to 30 mA
5.5
5.0
4.5
V
12.Output block
[Drive1, Drive2]
Output source
current
I
SOURCE
3, 22
OUT1 to OUT4
=
7 V,
Duty
≤
5
%
(t
=
1/f
OSC
×Duty)
OUT1 to OUT4
=
12 V,
Duty
≤
5
%
(t
=
1/f
OSC
×Duty)
OUT1
=
OUT2
= −45
mA
OUT1
=
OUT2
=
45 mA
IC Active mode
IC Standby mode
CTL
=
5 V
CTL
=
0 V
CTL
=
0 V
CTL
=
5 V
−300
mA
Output sink current
Output ON
resistor
CTL input voltage
I
SINK
R
OH
R
OL
V
IH
V
IL
I
CTLH
3, 22
3, 22
3, 22
24
24
24
24
1, 17
1, 17
2
0
350
8.0
6.5
50
0
4.0
12.0
9.7
19
0.8
100
1
10
6.0
mA
Ω
Ω
V
V
µA
µA
µA
mA
13.Control block
[CTL]
Input current
Standby current
Power supply
current
I
CTLL
I
CCS
I
CC
*: Standard design value.
7
14.General
FUJITSU [ FUJITSU COMPONENT LIMITED. ]
