MBM29LV800TE/BE
60/70/90
s
FEATURES
•
0.23
µ
m Process Technology
•
Single 3.0 V Read, Program, and Erase
Minimized system level power requirements
•
Compatible with JEDEC-standard Commands
Use the same software commands as E
2
PROMs
•
Compatible with JEDEC-standard World-wide Pinouts
48-pin TSOP (1) (Package suffix : TN Normal Bend Type)
48-pin CSOP (Package suffix : PCV)
48-ball FBGA (Package suffix : PBT)
•
Minimum 100,000 Program/Erase Cycles
•
High Performance
70 ns maximum access time
•
Sector Erase Architecture
One 8 Kwords, two 4 Kwords, one 16 Kwords, and fifteen 32 Kwords sectors in word mode
One 16 Kbytes, two 8 Kbytes, one 32 Kbytes, and fifteen 64 Kbytes sectors in byte mode
Any combination of sectors can be concurrently erased, and also supports full chip erase.
•
Boot Code Sector Architecture
T
=
Top sector
B
=
Bottom sector
•
Embedded Erase
TM
* Algorithm
Automatically pre-programs and erases the chip or any sector.
•
Embedded Program
TM
* Algorithm
Automatically writes and verifies data at specified address.
• Data Polling and Toggle Bit Feature for Detection of Program or Erase Cycle Completion
•
Ready/Busy Output
(RY/BY)
Hardware method for detection of program or erase cycle completion
•
Automatic Sleep Mode
When addresses remain stable, MBM29LV800TE/BE automatically switch themselves to low power mode.
•
Low V
CC
Write Inhibit
≤
2.5 V
•
Erase Suspend/Resume
Suspends the erase operation to allow a read data and/or program in another sector within the same device.
•
Sector Protection
Hardware method disables any combination of sectors from program or erase operations.
• Sector Protection Set Function by Extended Sector Protection Command
• Fast Programming Function by Extended Command
•
Temporary Sector Unprotection
Temporary sector unprotection via the RESET pin
* : Embedde Erase
TM
and Embedded Program
TM
are trademarks of Advanced Micro Devices, Inc.
3
FUJITSU [ FUJITSU COMPONENT LIMITED. ]
