MBM29LV800TE/BE60/70/90
■ AC CHARACTERISTICS
• Read Only Operations Characteristics
Value*
70
Min Max Min Max Min Max
60 70 90
Symbols
Test
Setup
Parameter
60
90
Unit
JEDEC Standard
Read Cycle Time
tAVAV
tRC
ns
ns
CE = VIL
OE = VIL
Address to Output Delay
tAVQV
tACC
60
70
90
Chip Enable to Output Delay
Output Enable to Output Delay
Chip Enable to Output High-Z
Output Enable to Output High-Z
tELQV
tGLQV
tEHQZ
tGHQZ
tCE
tOE
tDF
tDF
OE = VIL
60
30
25
25
70
30
25
25
90
35
30
30
ns
ns
ns
ns
Output Hold Time From Addresses,
CE or OE, Whichever Occurs First
tAXQX
tOH
0
0
0
ns
µs
ns
RESET Pin Low to Read Mode
tREADY
20
5
20
5
20
5
tELFL
tELFH
CE to BYTE Switching Low or High
* : Test Conditions :
Output Load : 1 TTL gate and 30 pF (MBM29LV800TE60/BE60, MBM29LV800TE70/BE70)
1 TTL gate and 100 pF (MBM29LV800TE90/BE90)
Input rise and fall times : 5 ns
Input pulse levels : 0.0 V or 3.0 V
Timing measurement reference level
Input : 1.5 V
Output : 1.5 V
3.3 V
Diode = 1N3064
or equivalent
2.7 kΩ
Device
Under
Test
6.2 kΩ
CL
Diode = 1N3064
or equivalent
Note : CL = 30 pF including jig capacitance (MBM29LV800TE60/BE60, MBM29LV800TE70/BE70)
CL = 100 pF including jig capacitance (MBM29LV800TE90/BE90)
Test Conditions
29
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