FA5502P/M
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(2) Voltage error amplifier and overvoltage
limiting circuit
(3) Current error amplifier and overcurrent
limiter circuit
ER.AMP is an error amplifier which constitutes a
voltage feedback loop for keeping the output voltage
constant. The non-inverting input is internally
connected to reference voltage Vr of 1.55V (typ.).
Fig.6 shows the connection. The output voltage is
determined by:
CUR.AMP is an error amplifier which constitutes a
current loop to control the line current to a sinusoidal
waveform. As shown in Fig.7, to IIN- pin (pin 2), a
multiplier output is connected via resistor RA as a
current reference signal. Inductor current is monitored
by IDET pin (pin 16). The IDET pin should be used
within the voltage range from 0V to –1.0V in normal
operation. RC network for loop compensation is
connected between IFB pin and IIN- pin. According to
the circuit in Fig.7, the characteristics of voltage gain
AV are as shown in Fig.8. Where,
R1+ R2
R1
VO
=
× Vr • • • • • (1)
The error amplifier output is pinned out at VFB pin
(pin 5). Between VFB pin and VIN- pin, RC network
are connected for loop compensation. The voltage
gain Av is expressed by
1
Z =
• • • • • (5)
2πR5×C3
R4
AV
=
• • • • • (2)
R3(1+ jωC1×R4)
1
C2×C3
C2 + C3
P =
C =
• • • • • (6)
2πR5×C
Cutoff frequency fc is expressed by:
1
Voltage gain (G1) between Z and P (gain between
IDET pin and IFB pin) in Fig.8 is:
fC
=
• • • • • (3)
2πC1×R4
R5
RA
G1= 20log 0.75
+1
• • • • • (7)
If 100Hz or 120Hz ripples appear at the error
amplifier output, the PFC converter will not operate
stably. Therefore, determine C1 and R4 so that voltage
gain Av at 100 Hz or 120 Hz will be small enough. Also
set fc to approximately 1Hz to ensure a stable
operation. Practically, the optimum value should be
determined by evaluation in the actual circuit.
Select C2 and C3 so that P/Z will be about 10 for
adequate phase margin. The output of current error
amplifier is input to PWM comparator.
The optimum value of loop compensation should be
determined by evaluation in actual circuit referring to
application circuit, etc.
To limit the output voltage when it has risen above
the normal voltage, overvoltage limiting comparator
OVP.COMP is incorporated. Its threshold voltage Vp is
as follows:
To limit the overcurrent, overcurrent limiting
comparator OCP.COMP is provided. The threshold
voltage at IDET pin is -1.10V (typ.). If a noise is picked
up at IDET pin, suppress it by connecting Rn and Cn.
Rn must be lower than 27 Ω.
VP = α × Vr (α=1.058(typ)) • • • • • (4)
According to the connection in Fig.6, therefore, the
output overvoltage is limited to 1.058 times (typ.) the
normal output voltage.
MUL
Vm
R5
Vo
IFB
IIN-
1
2
C3
C1
VFB
VIN-
RA
5
6
11k
CUR.AMP
C2
R2
R1
R4
R3
PWM
ER.AMP
comparator
MUL
F.F.
REF
5V
RC
RB
IDET
16
4.85k 15k
Vr
=1.55V(typ.)
Rn
OCP.COMP
0.39V
Cn
F.F.
OVP.COMP
OVP
4
currnet
detection
Vp
Fig.7 Current error amplifier and overcurrent limiting
circuit
=1.058Vr(typ.)
Fig.6 Voltage error amplifier and overvoltage limiting
circuit
14
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