Datasheet
Vinculum-II Embedded Dual USB Host Controller IC
Version 1.7
Document No.: FT_000138 Clearance No.: FTDI#143
6 Peripheral Interfaces
In addition to the two USB Host and Slave blocks, VNC2 contains the following peripheral interfaces:
Universal Asynchronous Receiver Transmitter (UART)
Two Serial Peripheral Interface (SPI) slaves
SPI Master
Debugger Interface
Parallel FIFO Interface (245 mode and synchronous FIFO mode)
General Purpose Timers
Eight Pulse Width Modulation blocks (PWM)
General Purpose Input Output (GPIO)
The following sections describe each peripheral in detail.
6.1 UART Interface
When the data and control bus are configured in UART mode, the interface implements a standard
asynchronous serial UART port with flow control, for example RS232/422/485. The UART can support
baud rates from 183 baud to 6 Mbaud. The maximum UART speed is determined by the CPU speed/8.The
CPU can be run at three frequencies, therefore the following maximumrates apply:
CPU Frequency
48 MHz
Maximum UART Speed
6 Mbaud
24 MHz
3 Mbaud
12 MHz
1.5 Mbaud
Data transfer uses NRZ (Non-Return to Zero) data format consisting of 1 start bit, 7 or 8 data bits, an
optional parity bit, and one or two stop bits. When transmitting the data bits, the least significant bit is
transmitted first. Transmit and receive waveforms are illustrated in Figure 6.1 and Figure 6.2:
Figure 6.1 UART Receive Waveform
Figure 6.2 UART Transmit Waveform
Baud rate (default =9600 baud), flow control settings (default = RTS/CTS), number of data bits
(default=8), parity (default is no parity) and number of stop bits (default=1) are all configurable using
the firmware command interface. Please refer to http://www.ftdichip.com.
uart_tx_active is transmit enable, this output may be used in RS485 designs to control the transmit of
the line driver.
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