Document Reference No.: FT_000163
V2DIP1-32 VNC2-32Q Development Module Datasheet Version 1.01
Clearance No.: FTDI# 150
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3.5 Serial Peripheral Interface (SPI)
The VNC2-32Q has one SPI master module and two SPI slave modules. These modules are described
more fully in a
VNC2
datasheet please refer to:-
3.5.1 Signal Description - SPI Slave
The SPI Slave signals can be programmed to a choice of available I/O pins.
explains the
available pins for each of the SPI Slave signals.
Name
Available Pins
Type
Description
J2-10, J1-6, J1-11
spi_s0_clk
spi_s1_clk
spi_s0_mosi
Input
Slave clock input
Input/Output
Master Out Slave In
Synchronous data from master to
slave
J2-9, J1-8, J1-12
spi_s1_mosi
spi_s0_miso
Output
Master In Slave Out
Synchronous data from slave to
master
J2-8, J1-9, J2-12
spi_s1_miso
spi_s0_ss#
Input
J2-6, J1-10, J2-11
Slave chip select
spi_s1_ss#
Table 3.4 - Data and Control Bus Signal Mode Options – SPI Slave
3.5.2 Signal Description - SPI Master
The SPI Master signals can be programmed to a choice of available I/O pins.
shows the SPI
master signals and the available pins that they can be mapped.
Available Pins
Name
Type
Description
J2-10, J1-6, J1-11
spi_m_clk
Output
SPI master clock input
spi_m_mosi
J2-9, J1-8, J1-12
Output
Master Out Slave In
Synchronous data from master to
slave
spi_m_miso
J2-8, J1-9, J2-12
Input
Master In Slave Out
Synchronous data from slave to
master
spi_m_ss_0#
J2-6, J1-10, J2-11
J2-10, J1-6, J1-11
spi_m_ss_1#
Output
Active low slave select 0 from master
to
slave 0
Output
Active low slave select 1 from master
to
slave 1
Table 3.5 - Data and Control Bus Signal Mode Options – SPI Master
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