Document Reference No.: FT_000247
V2-EVAL Vinculum II Evaluation Board Datasheet Version 2.0
Clearance No.: FTDI#148
5.18
VNC2 Daughterboard Connector – J2
1
2
Figure 5.23
VNC2 Daughterboard Connector J2
VCN2 Pin No
Schematic
Connector
IO
Description
Signal Name(44)
Pin
type
32-PIN 48-PIN 64-PIN
Connected to
P1 pin 30 / CN10 pin 6 / CN6 pin 2.
Connected to
P1 pin 31 / CN10 pin 7 / CN6 pin 3.
Connected to
P1 pin 32 / CN10 pin 8 / CN6 pin 4.
Connected to
P1 pin 33 / CN10 pin 9 / CN6 pin 5.
V_DSR#
V_DCD#
V_RI#
1
2
3
4
-
-
-
-
36
37
38
41
44
45
46
47
IO
IO
IO
IO
V_TXDEN
3.3V
5
6
-
-
-
-
-
-
3.3V power rail.
3.3V
-
-
3.3V power rail.
GPIO7
7
-
42
43
44
-
48
49
50
57
58
59
-
IO
IO
IO
IO
IO
IO
-
Connected to P1 pin 34 / CN6 pin 6.
Connected to P1 pin 36 / CN6 pin 7.
Connected to P1 pin 37 / CN6 pin 8.
Connected to P1 pin 42 / CN7 pin 5.
Connected to P1 pin 43 / CN7 pin 6.
Connected to P1 pin 44 / CN7 pin 7.
Ground pin.
GPIO8
8
-
GPIO9
9
-
SPI_S1_CLK
SPI_S1_MOSI
SPI_S1_MISO
GND
10
11
12
13
14
15
16
-
-
-
-
-
-
-
SPI_S1_CS#
DEBUG_IF
-
-
60
11
-
IO
IO
-
Connected to P1 pin 45 / CN7 pin 8.
Debug pin. Connected to P1 pin 4 / CN3 pin 1.
Ground pin.
11
-
11
-
GND
Notes:
(44) The signal names relate to the labels used on pages 1 & 2 of the V2-EVAL base board schematic. Unless
otherwise stated, the function of the IO signals is set by the user application running on the VNC2.
Table 5.19 Connector J2 Pinout
Copyright © 2010 Future Technology Devices International Limited
35
FTDI [ FUTURE TECHNOLOGY DEVICES INTERNATIONAL LTD. ]
