Datasheet
Vinculum-II Embedded Dual USB Host Controller IC
Version 1.7
Document No.: FT_000138 Clearance No.: FTDI#143
3.10 Pin Configuration USB and Power
Pin No
48 pin
Name
Type
Description
64 pin
32 pin
USB host/slave port 1 - USB Data Signal Plus with
integrated pull-up/pull-down resistor.
33
25
26
28
29
17
USB1DP
USB1DM
USB2DP
USB2DM
I/O
I/O
I/O
I/O
USB host/slave port 1 - USB Data Signal Minus with
integrated pull-up/pull-down resistor.
34
36
37
18
20
21
USB host/slave port 2 - USB Data Signal Plus with
integrated pull-up/pull-down resistor.
USB host/slave port 2 - USB Data Signal Minus with
integrated pull-up/pull-down resistor.
Table 3.1 USB Interface Group
Pin No
48 pin
Name
Type
Description
64 pin
32 pin
1, 30,
35, 53
1, 24,
27, 39
1, 16,
19, 27
GND
PWR
PWR
Device groundsupply pins.
3.3V
VREGIN
2
3
2
2
3
+3.3V supply to the regulator.
+1.8V supply to the internal clock multiplier. This pin
requires a 100nF decouplingcapacitor.
1.8V
VCC PLL
IN
* 48 pin LQFP package only – This power input is internally
connected to VREG_OUT.
3*
PWR
All other packages need this pin connectedto a 1.8V power
source. Most common applications will connect this to
VREG_OUT.
6
7
6
6
7
GND PLL
PWR
Device analogue ground supply for internal clock multiplier.
1.8V output from regulatorto device core
VREG
OUT
7*
Output
* N/C on 48 pin LQFP package only.
All other packages will typically need to connect pins 7 and
3.
+3.3V supply to the input / output. Interface pins
(IOBUS). Leaving the VCCIO unconnected will leadto
unpredictable operationon the interface pins.
21, 38,
54
17, 30,
40
13, 22,
28
VCCIO
PWR
Table 3.2 Power and Ground
16
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